W83194R-58A Datasheet, PDF (3/13 Pages) Winbond – 100MHZ AGP CLOCK FOR VIA CHIPSET

W83194R-58A
Vdd
1
* REF0/CPU3.3#_2.5
2
Vss
3
Xin
4
Xout
5
Vddq3
6
PCICLK_F/*FS1
7
PCICLK0/*FS2
8
Vss
9
PCICLK1
10
PCICLK2
11
PCICLK3
12
PCICLK4
13
Vddq3
14
AGP0
15
Vss
16
CPU_STOP#/SDRAM11
17
PCI_STOP#/SDRAM10
18
Vddq3
19
SDRAM 9
20
SDRAM 8
21
Vss
22
SDATA
SDCLK
23
24
5.0 PIN DESCRIPTION
IN - Input
OUT - Output
I/O - Bi-directional Pin
# - Active Low
* - Internal 250kΩ pull-up
PRELIMINARY
48
Vddq2
47
AGP1
46
REF1/*SD_SEL#
45
Vss
44
CPUCLK0
43
CPUCLK1
42
Vddq2b
41
CPUCLK2
40
CPUCLK3
39
Vss
38
SDRAM 0
37
SDRAM 1
36
Vddq3
35
SDRAM 2
34
SDRAM 3
33
Vss
32
SDRAM 4
31
SDRAM 5
30
Vddq3
29
SDRAM 6
28
SDRAM 7
27
Vss
26
48MHz/*FS0
25
24MHz/*MODE
5.1 Crystal I/O
SYMBOL
Xin
Xout
PIN
I/O
FUNCTION
4
IN Crystal input with internal loading capacitors and
feedback resistors.
5
OUT Crystal output at 14.318MHz nominally.
5.2 CPU, SDRAM, PCI Clock Outputs
SYMBOL
CPUCLK [ 0:3 ]
PIN
40,41,43,44
I/O
OUT
FUNCTION
Low skew (< 250ps) clock outputs for host
frequencies such as CPU, Chipset and Cache.
Vddq2b is the supply voltage for these outputs.
Publication Release Date: Nov. 1999
-3-
Revision 0.30