W25X10L Datasheet, PDF (22/46 Pages) Winbond – 1M-BIT, 2M-BIT, 4M-BIT AND 8M-BIT 2.5V SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL OUTPUT SPI

W25X10L, W25X20L, W25X40L, W25X80L
9.2.10 Page Program (02h)
The Page Program instruction allows up to 256 bytes of data to be programmed at previously erased
to all 1s (FFh) memory locations. A Write Enable instruction must be executed before the device will
accept the Page Program Instruction (Status Register bit WEL must equal 1). The Page Program
instruction sequence is shown in figure 11. The instruction is initiated by driving the /CS pin low then
shifting the instruction code “02h” followed by a 24-bit address (A23-A0) and at least one data byte,
into the DIO pin. The /CS pin must be held low for the entire length of the instruction while data is
being sent to the device. If more than 256 bytes are sent to the device the addressing will wrap to the
beginning of the page and overwrite previously sent data.
The W25X10/20/40/80L program address must start on a page boundary (A7-A0 = 00h). If it is
necessary to program an address within a page (A7-A0 = /00h), use the following procedure: read all
256 bytes from a page into working RAM, append the new data (only 1's can be changed to 0's) and
then program 256-bytes starting at the page boundary address (A7-A0 = 00h).
The /CS pin must be driven high after the eighth bit of the last byte has been latched. If this is not
done the Page Program instruction will not be executed. After /CS is driven high, the self-timed Page
Program instruction will commence for a time duration of t_PP (See AC Characteristics). While the Page
Program cycle is in progress, the Read Status Register instruction may still be accessed for checking
the status of the BUSY bit. It is recommended to wait for a duration of t_BP1 (~100uS typ.) before
reading the status register to check the BUSY bit. The BUSY bit is a 1 during the Page Program
cycle and becomes a 0 when the cycle is finished and the device is ready to accept other instructions
again. After the Page Program cycle has finished the Write Enable Latch (WEL) bit in the Status
Register is cleared to 0. The Page Program instruction will not be executed if the addressed page is
protected by the Block Protect (BP2, BP1, and BP0) bits (see Status Register Memory Protection
table).
Figure 11. Page Program Instruction Sequence Diagram
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Publication Release Date: February 27, 2008
Revision I