W9816G6JH Datasheet, PDF (20/42 Pages) Winbond – 512K X 2 BANKS X 16 BITS SDRAM

W9816G6JH
10.4 Mode Register Set Cycle
tRSC
CLK
CS
tCMS tCMH
RAS
CAS
WE
A0-A10
BA
tCMS tCMH
tCMS tCMH
tCMS tCMH
tAS
tAH
Register
set data
A0
A1 Burst Length
A2
A3 Addressing Mode
A4
A5 CAS Latency
A6
A07 "0" (Test Mode)
A8 "0" Reserved
A9
Write Mode
A10 _"0"
Reserved
BAA0 _"0"
next
command
A0
A2 A01 A0
0 A00 0
0 A00 1
0 A10 0
0 A10 1
1 A00 0
1 A00 1
1 A10 0
1 A10 1
A03
A00
A10
A6 A05 A4
0 A00 0
0 A00 1
0 A10 0
0 A10 1
1 A00 0
A09
A00
A10
BurstAL0ength
SeqAue0ntial InteArle0ave
1
A10
A20
A20
A40
A40
A80
A80
ResAe0rved
FullAP0age
ResAe0rved
AddressAin0g Mode
SeqAue0ntial
InteArle0ave
CAS ALa0tency
ResAe0rved
ResAe0rved
2
A30
Reserved
Single Write Mode
Burst read aAn0d Burst write
Burst read aAn0d single write
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Publication Release Date: Jun. 24, 2014
Revision: A01