W9425G6EH Datasheet, PDF (2/50 Pages) Winbond – 4 M × 4 BANKS × 16 BITS DDR SDRAM

W9425G6EH
7.10.2 Addressing Mode Select (A3)...............................................................................................15
7.10.3 CAS Latency field (A6 to A4)................................................................................................16
7.10.4 DLL Reset bit (A8) ................................................................................................................16
7.10.5 Mode Register /Extended Mode register change bits (BA0, BA1) ........................................16
7.10.6 Extended Mode Register field ..............................................................................................16
7.10.7 Reserved field ......................................................................................................................16
8. OPERATION MODE .................................................................................................................... 17
8.1 Simplified Truth Table........................................................................................................ 17
8.2 Function Truth Table ......................................................................................................... 18
8.3 Function Truth Table for CKE............................................................................................ 21
8.4 Simplified Stated Diagram ................................................................................................. 22
9. ELECTRICAL CHARACTERISTICS ............................................................................................ 23
9.1 Absolute Maximum Ratings............................................................................................... 23
9.2 Recommended DC Operating Conditions ......................................................................... 23
9.3 Capacitance....................................................................................................................... 24
9.4 Leakage and Output Buffer Characteristics ...................................................................... 24
9.5 DC Characteristics............................................................................................................. 25
9.6 AC Characteristics and Operating Condition..................................................................... 26
9.7 AC Test Conditions............................................................................................................ 28
9.8 AC Overshoot/Undershoot Specification for Address and Control Pins ........................... 30
9.9 Overshoot/Undershoot Specification for Data, Strobe, and Mask Pins ............................ 31
10. TIMING WAVEFORMS ................................................................................................................ 32
10.1 Command Input Timing ..................................................................................................... 32
10.2 Timing of the CLK Signals ................................................................................................. 32
10.3 Read Timing (Burst Length = 4) ........................................................................................ 33
10.4 Write Timing (Burst Length = 4) ........................................................................................ 34
10.5 DM, DATA MASK (W9425G6EH) ..................................................................................... 35
10.6 Mode Register Set (MRS) Timing ..................................................................................... 36
10.7 Extend Mode Register Set (EMRS) Timing....................................................................... 37
10.8 Auto-precharge Timing (Read Cycle, CL = 2) ................................................................... 38
10.9 Auto-precharge Timing (Read cycle, CL = 2), continued .................................................. 39
10.10 Auto-precharge Timing (Write Cycle) ................................................................................ 40
10.11 Read Interrupted by Read (CL = 2, BL = 2, 4, 8) .............................................................. 41
10.12 Burst Read Stop (BL = 8) .................................................................................................. 41
10.13 Read Interrupted by Write & BST (BL = 8)........................................................................ 42
10.14 Read Interrupted by Precharge (BL = 8) ........................................................................... 42
10.15 Write Interrupted by Write (BL = 2, 4, 8) ........................................................................... 43
Publication Release Date:Apr. 11, 2008
-2-
Revision A04