English
Language : 

W6694 Datasheet, PDF (2/33 Pages) Winbond – USB Bus ISDN S/T-Controller
Preliminary W6694
Table of Contents-
1. GENERAL DESCRIPTION ............................................................................................................ 4
2. FEATURES ................................................................................................................................... 4
ISDN .............................................................................................................................................. 4
USB ............................................................................................................................................... 4
Other Features............................................................................................................................... 4
3. PIN CONFIGURATION.................................................................................................................. 5
4. PIN DESCRIPTION ....................................................................................................................... 6
5. SYSTEM DIAGRAM AND APPLICATIONS................................................................................... 8
6. BLOCK DIAGRAM ........................................................................................................................ 9
7. FUNCTIONAL DESCRIPTIONS .................................................................................................... 9
7.1 USB Descriptions ..................................................................................................................... 9
7.1.1 Control-IN Transactions (Endpoint 0)............................................................................ 10
7.1.2 Control-OUT Transactions (Endpoint 0)........................................................................ 13
7.1.3 Bulk-OUT Transaction (Endpoint 1) .............................................................................. 13
7.1.4 Bulk-IN Transaction (Endpoint 2) .................................................................................. 14
7.1.5 Interrupt-IN Transaction (Endpoint 3)............................................................................ 14
7.1.6 Isochronous-OUT Transaction (Endpoint 4) .................................................................. 14
7.1.7 Isochronous-IN Transaction (Endpoint 5) ...................................................................... 16
7.1.8 Suspend and Resume .................................................................................................. 17
7.2 Configuration EEPROM ......................................................................................................... 17
8. REGISTER DESCRIPTIONS ....................................................................................................... 18
8.1 Interrupt Registers.................................................................................................................. 18
8.1.1 Interrupt Status Register ISTA Read_clear............................................................... 18
8.1.2 Layer 1 Command/Indication Register CIR Read ....................................................... 18
8.1.3 Monitor Channel Interrupt Status MOIR Read_clear................................................. 19
8.1.4 PIO Input Change Register PICR Read_clear .......................................................... 19
8.2 Chip and FIFO Control Registers............................................................................................ 19
8.2.1 Interrupt Mask Register IMASK Read/Write Address 00h.......................................... 19
8.2.2 Command Register 1 CMDR1 Write Address 01h.................................................... 20
8.2.3 Command Register 2 CMDR2 Write Address 02h.................................................... 21
8.2.4 Control Register CTL Read/Write Address 03h ...................................................... 21
8.2.5 Layer 1 Command/Indication Register CIX Read/Write Address 04h......................... 22
8.2.6 U-layer1 Ready Code L1_RC Read/Write Address 05h............................................. 22
8.3 GCI Mode Registers ............................................................................................................... 22
8.3.1 GCI Mode Command Register GCR Read/Write Address 06h ................................. 22
8.3.2 Monitor Channel Control Register MOCR Read/Write Address 07h........................... 23
8.3.3 Monitor Channel Receive Register MOR Read Address 08h .................................... 24
-2-