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W25X40BL Datasheet, PDF (2/55 Pages) Winbond – 2.5V 4M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL I/O SPI
W25X40BL
Table of Contents
1. GENERAL DESCRIPTION.......................................................................................................... 4
2. FEATURES ................................................................................................................................. 4
3. PACKAGE TYPES AND PIN CONFIGURATIONS ..................................................................... 5
3.1 Pin Configuration SOIC 150 / 208-mil, VSOP 150-mil .................................................... 5
3.2 Pad Configuration WSON 6x5-mm, USON 2x3-mm ...................................................... 5
3.3 Pin Configuration PDIP 300-mil ...................................................................................... 6
3.4 Pin/Pad Descriptions....................................................................................................... 6
4. SIGNAL DESCRIPTIONS ........................................................................................................... 7
4.1 Chip Select (/CS) ............................................................................................................ 7
4.2 Serial Data Input, Output and IOs (DI, DO, IO0 and IO1)............................................... 7
4.3 Write Protect (/WP)......................................................................................................... 7
4.4 HOLD (/HOLD)................................................................................................................ 7
4.5 Serial Clock (CLK) .......................................................................................................... 7
5. BLOCK DIAGRAM ...................................................................................................................... 8
6. FUNCTIONAL DESCRIPTIONS ................................................................................................. 9
6.1 SPI OPERATIONS.......................................................................................................... 9
6.1.1 Standard SPI Instructions.................................................................................................9
6.1.2 Dual SPI Instructions ........................................................................................................9
6.1.3 Hold Function ...................................................................................................................9
6.2 WRITE PROTECTION ................................................................................................. 10
6.2.1 Write Protect Features ...................................................................................................10
7. STATUS REGISTER AND INSTRUCTIONS ............................................................................ 11
7.1 STATUS REGISTER .................................................................................................... 11
7.1.1 BUSY Status (BUSY)......................................................................................................11
7.1.2 Write Enable Latch Status (WEL)...................................................................................11
7.1.3 Block Protect Bits (BP2, BP1, BP0)................................................................................11
7.1.4 Top/Bottom Block Protect Bit (TB)..................................................................................11
7.1.5 Reserved Bit ...................................................................................................................11
7.1.6 Status Register Protect (SRP) ........................................................................................12
7.1.7 Status Register Memory Protection ................................................................................12
7.2 INSTRUCTIONS ........................................................................................................... 13
7.2.1 Manufacturer and Device Identification ..........................................................................13
7.2.2 Instruction Set.................................................................................................................14
7.2.3 Write Enable (06h) .........................................................................................................15
7.2.4 Write Enable for Volatile Status Register (50h) ..............................................................15
7.2.5 Write Disable (04h).........................................................................................................16
7.2.6 Read Status Register (05h) ............................................................................................17
7.2.7 Write Status Register (01h) ............................................................................................17
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