W25X40BL Datasheet, PDF (17/55 Pages) Winbond – 2.5V 4M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL I/O SPI

W25X40BL
7.2.6 Read Status Register (05h)
The Read Status Register instruction allows the 8-bit Status Register to be read. The instruction is
entered by driving /CS low and shifting the instruction code “05h” into the DIO pin on the rising edge of
CLK. The status register bits are then shifted out on the DO pin at the falling edge of CLK with most
significant bit (MSB) first as shown in figure 7. The Status Register bits are shown in figure 3 and
include the BUSY, WEL, BP2-BP0, TB and SRP bits (see description of the Status Register earlier in
this datasheet).
The Status Register instruction may be used at any time, even while a Program, Erase or Write Status
Register cycle is in progress. This allows the BUSY status bit to be checked to determine when the
cycle is complete and if the device can accept another instruction. The Status Register can be read
continuously, as shown in Figure 7. The instruction is completed by driving /CS high.
/CS
CLK
Mode 3
Mode 0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
DI
(IO0)
DO
(IO1)
* ^{= MSB}
Instruction (05h)
High Impedance
Status Register out
Status Register out
76543210765432107
*
*
Figure 7. Read Status Register Instruction Sequence Diagram
7.2.7 Write Status Register (01h)
The Write Status Register instruction allows the Status Register to be written. Only non-volatile Status
Register bits SRP, TB, BP2, BP1, BP0 (bits 7 thru 2 of Status Register) can be written to. All other
Status Register bit locations are read-only and will not be affected by the Write Status Register
instruction. The Status Register bits are shown in figure 3 and described in 7.1.
To write non-volatile Status Register bits, a standard Write Enable (06h) instruction must previously
have been executed for the device to accept the Write Status Register Instruction (Status Register bit
WEL must equal 1). Once write enabled, the instruction is entered by driving /CS low, sending the
instruction code “01h”, and then writing the status register data byte as illustrated in figure 8.
To write volatile Status Register bits, a Write Enable for Volatile Status Register (50h) instruction must
have been executed prior to the Write Status Register instruction (Status Register bit WEL remains 0).
Upon power off, the volatile Status Register bit values will be lost, and the non-volatile Status Register
bit values will be restored when power on again.
To complete the Write Status Register instruction, the /CS pin must be driven high after the eighth bit
of data that is clocked in. If this is not done the Write Status Register instruction will not be executed.
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Publication Release Date: April 21, 2011
Preliminary - Revision B