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W83194BR-903_06 Datasheet, PDF (17/26 Pages) Winbond – STEPLESS VIA PT/PM MAIN CLOCK GENERATOR
W83194BR-903/W83194BG-903
7.16 Register 15: SST & Skew Control (Default: 2Ch)
BIT
NAME PWD
DESCRIPTION
7 INV_CPU
0 Invert the CPU phase, 0: Default, 1: Inverse
6 Reserved
0 Reserved
5 SPSP_TYPE 1 Spread spectrum implementation method
1: Pendulum type, 0: Original
4 SPSP1
0 Spread Spectrum type select.
3 SPSP0
1
00: Down 1%
01: Down 0.5%
10: Center +/- 0.5%
11: Center +/- 0.25%
2 ASKEW [2]
1 CPU to AGP skew control, Skew resolution is 340ps
1 ASKEW [1]
0 Expand the skew direction is same as
0 ASKEW [0]
0 CPU_AGP_SKEW [2:0] setting
7.17 Register 16: Skew Control (Default: 24h)
BIT
NAME PWD
DESCRIPTION
7 INV_AGP
0 Invert the AGP phase, 0: Default, 1: Inverse
6 INV_PCI
0 Invert the PCI phase, 0: Default, 1: Inverse
5 Reserved
1 Reserved
4 Reserved
0
3 Reserved
0
2 PSKEW [2]
1 PSKEW [1]
0 PSKEW [0]
1 CPU to PCI skew control, Skew resolution is 340ps
0 Expand the skew direction is same as
0 CPU_PCI_SKEW [2:0] setting
7.18 Register 17: Slew rate Control (Default: 00h)
BIT
NAME PWD
DESCRIPTION
7 PCI_F2_S2
6 PCI_F2_S1
0 PCI_F2 slew rate control
0 11: Strong, 00: Weak, 10/01: Normal
5 PCI_F0_S2
4 PCI_F0_S1
0 PCI_F1 / PCI_F0 slew rate control
0 11: Strong, 00: Weak, 10/01: Normal
3 AGP_2_S2
2 AGP_2_S1
0 AGP2 slew rate control
0 11: Strong, 00: Weak, 10/01: Normal
1 AGP_10_S2
0 AGP_10_S1
0 AGP_1 /AGP_0 slew rate control
0 11: Strong, 00: Weak, 10/01: Normal
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Publication Release Date: May 2006
Revision 1.0