W83194BR-903_06 Datasheet, PDF (12/26 Pages) Winbond – STEPLESS VIA PT/PM MAIN CLOCK GENERATOR

W83194BR-903/W83194BG-903
7.3 Register 2: PCI Clock (1 = Enable, 0 = Stopped) (Default: FFh)
BIT
PIN NO PWD
DESCRIPTION
7
9
1 PCI_F2 output control.
6
8
1 PCI_F1 output control.
5
7
1 PCI_F0 output control.
4
Reserve
1 Reserved
3
20
1 PCI6 output control.
2
19
1 PCI5 output control.
1
16
1 PCI4 output control.
0
15
1 PCI3 output control.
7.4 Register 3: PCI, AGP Clock (1 = Enable, 0 = Stopped) (Default: FFh)
BIT
PIN NO PWD
DESCRIPTION
7
14
1 PCI2 output control.
6
13
1 PCI1 output control.
5
12
1 PCI0 output control.
4
-
1 Don’t modify it
3
25
1 AGP_2 output control.
2
26
1 AGP_1 output control.
1
29
1 AGP_0 output control.
0
-
1 Don’t modify it
7.5 Register 4: 24_48MHz, 48MHz, REF, 25MHz Control (1 = Enable, 0 = Stopped)
(Default: BFh)
BIT
PIN NO PWD
DESCRIPTION
7
22
1 24_48MHz output control.
6
-
0 Reserved
5
21
1 48MHz output control.
4
-
1 Reserved
3
2
1 REF1 output control.
2
1
1 REF0 output control.
1
35
1 25MHz_1 output control.
0
36
1 25MHz_0 output control.
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