W79E648 Datasheet, PDF (16/80 Pages) Winbond – Fast 8051 Compatible microcontroller with a redesigned Processor

Preliminary W79E648
P4.0 Base Address Low Byte Register
Bit:
7
6
5
4
3
2
1
0
A7
A6
A5
A4
A3
A2
A1
A0
Mnemonic: P40AL
Address: 94h
P4.0 Base Address High Byte Register
Bit:
7
6
5
4
3
2
1
0
A15 A14 A13 A12 A11 A10
A9
A8
Mnemonic: P40AH
Address: 95h
P4.1 Base Address Low Byte Register
Bit:
7
6
5
4
3
2
1
0
A7
A6
A5
A4
A3
A2
A1
A0
Mnemonic: P41AL
Address: 96h
P4.1 Base Address High Byte Register
Bit:
7
6
5
4
3
2
1
0
A15 A14 A13 A12 A11 A10
A9
A8
Mnemonic: P41AH
Address: 97h
Serial Port Control
Bit:
7
6
5
4
3
2
1
0
SM0/FE SM1 SM2 REN TB8 RB8
TI
RI
Mnemonic: SCON
Address: 98h
SM0/FE: Serial port 0, Mode 0 bit or Framing Error Flag: The SMOD0 bit in PCON SFR determines
whether this bit acts as SM0 or as FE. The operation of SM0 is described below. When
used
as FE, this bit will be set to indicate an invalid stop bit. This bit must be manually cleared in
software to clear the FE condition.
SM1:
SM2:
Serial port Mode bit 1:
SM0
0
0
1
1
SM1
0
1
0
1
Mode
0
1
2
3
Description
Synchronous
Asynchronous
Asynchronous
Asynchronous
Length
8
10
11
11
Baud rate
4/12 Tclk
Variable
64/32 Tclk
Variable
Multiple processors communication. Setting this bit to 1 enables the multiprocessor
communication feature in mode 2 and 3. In mode 2 or 3, if SM2 is set to 1, then RI will not be
activated if the received 9th data bit (RB8) is 0. In mode 1, if SM2 = 1, then RI will not be
activated if a valid stop bit was not received. In mode 0, the SM2 bit controls the serial port
clock. If set to 0, then the serial port runs at a divide by 12 clock of the oscillator. This gives
- 16 -