W9825G6JH Datasheet, PDF (15/42 Pages) Winbond – 4 M  4 BANKS  16 BITS SDRAM

W9825G6JH
9.5 AC Characteristics and Operating Condition
(VDD = 3.3V  0.3V, TA = 0 to 70°C for -5/-6/-6L/-75/75L, TA = -40 to 85°C for -6I/-6A)
PARAMETER
-5
-6
-6I/-6A/-6L
-75/75L
SYM.
UNIT NOTES
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
Ref/Active to Ref/Active Command
Period
tRC
55
60
60
65
Active to precharge Command Period tRAS 40 100000 42 100000 42 100000 45 100000 nS
Active to Read/Write Command Delay
Time
tRCD
15
15
18
20
Read/Write(a) to Read/Write(b)
Command Period
tCCD
1
1
1
1
tCK
Precharge to Active Command Period tRP 15
15
18
20
nS
Active(a) to Active(b) Command
Period
tRRD
2
2
2
2
tCK
CL* = 2
2
2
2
2
Write Recovery Time
tWR
tCK
CL* = 3
2
2
2
2
CLK Cycle Time
CL* = 2
CL* = 3
10 1000 7.5 1000 10 1000 10 1000
tCK
5 1000 6 1000 6 1000 7.5 1000
CLK High Level width
tCH
2
2
2
2.5
8
CLK Low Level width
tCL
2
2
2
2.5
8
CL* = 2
6
6
Access Time from CLK
tAC
CL* = 3
5
5
6
6
9
5
5.4
Output Data Hold Time
tOH
3
3
3
3
9
Output Data High
Impedance Time
CL* = 2
tHZ
CL* = 3
5.4
5
5.4
5.4
5.4
6
7
5.4
5.4
7
Output Data Low Impedance Time
tLZ
0
0
0
0
9
Power Down Mode Entry Time
tSB
0
6
0
7
0
7
0
7.5 nS
Transition Time of CLK (Rise and Fall) tT
1
1
1
1
Data-in Set-up Time
tDS 1.5
1.5
1.5
1.5
8
Data-in Hold Time
tDH 1.0
0.8
0.8
1.0
8
Address Set-up Time
tAS 1.5
1.5
1.5
1.5
8
Address Hold Time
tAH 1.0
0.8
0.8
1.0
8
CKE Set-up Time
CKE Hold Time
Command Set-up Time
Command Hold Time
Refresh Time
tCKS 1.5
1.5
1.5
1.5
8
tCKH 1.0
0.8
0.8
1.0
8
tCMS 1.5
1.5
1.5
1.5
8
tCMH 1.0
0.8
0.8
1.0
8
tREF
64
64
64
64 mS
Mode register Set Cycle Time
tRSC
2
2
2
2
tCK
Exit self refresh to ACTIVE command
tXSR
70
72
72
75
nS
*CL = CAS Latency
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Publication Release Date: Nov. 29, 2011
Revision A04