W9812G6JH Datasheet, PDF (14/42 Pages) Winbond – 2M × 4 BANKS × 16 BITS SDRAM

W9812G6JH
9.4 DC Characteristics
(VDD = 3.3V ± 0.3V, TA = 0 to 70°C for -5/-6/-75, TA= -40 to 85°C for -6I/-6A)
PARAMETER
SYM.
MAX.
UNIT NOTES
-5 -6/-6I/-6A -75
Operating Current
t_CK = min., t_RC = min.
1 Bank operation
IDD1
55
50
45
3
Active precharge command
cycling without burst operation
Standby Current
tCK = min., CS = VIH
CKE = VIH
IDD2
25
20
20
3
VIH/L = VIH (min.)/VIL (max.)
CKE = VIL
Bank: Inactive state
IDD2P
2
2
2
3
(Power Down Mode)
Standby Current
CLK = VIL, CS = VIH
VIH/L=VIH (min.)/VIL (max.)
CKE = VIH
IDD2S
12
12
12
Bank: Inactive state
CKE = VIL
IDD2PS
2
2
2
mA
(Power Down Mode)
No Operating Current
t_CK = min., CS = VIH(min)
CKE = VIH
IDD3
40
35
30
CKE = VIL
Bank: Active state (4 Banks)
IDD3P
12
12
12
(Power Down Mode)
Burst Operating Current
t_CK = min.
Read/ Write command cycling
IDD4
80
75
70
3, 4
Auto Refresh Current
t_CK = min.
Auto refresh command cycling
IDD5
70
65
60
3
Self Refresh Current
Self Refresh Mode
IDD6
2
2
2
CKE = 0.2V
PARAMETER
Input Leakage Current
(0V ≤ VIN ≤ VDD, all other pins not under test = 0V)
Output Leakage Current
(Output disable , 0V ≤ VOUT ≤ VDDQ)
LVTTL Output “H” Level Voltage
(IOUT = -2 mA)
LVTTL Output “L” Level Voltage
(IOUT = 2 mA )
SYM.
II(L)
IO(L)
VOH
VOL
MIN.
-5
-5
2.4
-
MAX.
5
5
-
0.4
UNIT
µA
NOTES
µA
V
V
- 14 -
Publication Release Date: Sep. 08, 2010
Revision A04