W83791SD Datasheet, PDF (13/22 Pages) Winbond – H/W MONITORING IC

W83791SD/W83791SG
7.11 Disable Abnormal BEEP Control Register  Index 4Dh (Bank 0)
Power on default [7:0]: 0001_0101; Reset by MR.
BIT
NAME
ATTRIBUTE
DESCRIPTION
7
DIS_ABN
Disable power-on abnormal the monitor voltage including
Vcore, and +3.3V. If these voltages exceed the limit value, the
R/W
pin of BEEP (Open Drain) will drive 300Hz and 600Hz
frequency signal. Write 1, the frequency will be disabled.
Default 0. After power on, the system should set 1 to this bit to 1
in order to disable BEEP.
6:0 Reserved
Reserved.
7.12 High Byte Access  Index 4Eh (Bank 0)
Power on default [7:0] 1000_0000b; Reset by MR.
NAME
ATTRIBUTE
DESCRIPTION
7
HBACS
High byte access. Set to 1, access Register 4Fh high byte
R/W
register. Set to 0, access Register 4Fh low byte register.
Default 1.
6:0 Reserved
Reserved
7.13 Winbond Vendor ID  Index 4Fh (Bank 0)
Power on default: A3h
BIT
NAME
ATTRIBUTE
DESCRIPTION
7:0 Vendor ID
Read Only
Vendor ID low byte if CR4E.bit7=0. Default A3h. Vendor ID high
byte if CR4E.bit7=1. Default 5Ch.
7.14 Winbond Test Register  Index 50h - 55h (Bank 0)
These Registers is reserved for Winbond test only. Users do not use these registers.
7.15 Chip ID -- Index 58h (Bank 0)
Power on default: 71h
BIT
NAME
7-0 CHIPID
ATTRIBUTE
DESCRIPTION
Read Only Winbond Chip ID. Read this register will return 71h.
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