W25P10 Datasheet, PDF (13/35 Pages) Winbond – 1M-BIT, 2M-BIT AND 4M-BIT SERIAL FLASH MEMORY WITH 40MHZ SPI

W25P10, W25P20 AND W25P40
7.2.3 Write Disable (04h)
The Write Enable instruction (Figure 4) sets the Write Enable Latch (WEL) bit in the Status Register to
a 1. The WEL bit must be set prior to every Page Program, Sector Erase, Chip Erase and Write Status
Register instruction. The Write Enable instruction is entered by driving /CS low, shifting the instruction
code “06h” into the Data Input (DI) pin on the rising edge of CLK, and then driving /CS high.
Figure 4. Write Disable Instruction Sequence Diagram
7.2.4 Write Enable (06h)
The Write Disable instruction (Figure 5) resets the Write Enable Latch (WEL) bit in the Status Register
to a 0. The Write Disable instruction is entered by driving /CS low, shifting the instruction code “04h”
into the DI pin and then driving /CS high. Note that the WEL bit is automatically reset after Power-up
and upon completion of the Write Status Register, Page Program, Sector Erase, and Chip Erase
instructions.
Figure 5. Write Enable Instruction Sequence Diagram
Publication Release Date: November 28, 2005
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Revision M