W29C040 Datasheet, PDF (12/20 Pages) Winbond – 512K X 8 CMOS FLASH MEMORY

W29C040
AC Characteristics, continued
Read Cycle Timing Parameters
(VDD = 5.0V ±10% for 90,120 and 150 nS, VSS = 0V, TA = 0 to 70° C)
PARAMETER
SYM.
Read Cycle Time
Chip Enable Access Time
Address Access Time
Output Enable Access Time
CE High to High-Z Output
OE High to High-Z Output
Output Hold from Address change
TRC
TCE
TAA
TOE
TCHZ
TOHZ
TOH
W29C040-90
MIN.
MAX.
90
-
-
90
-
90
-
40
-
25
-
25
0
-
W29C040-12
MIN.
MAX.
120
-
-
120
-
120
-
50
-
30
-
30
0
-
UNIT
nS
nS
nS
nS
nS
nS
nS
Byte/Page-write Cycle Timing Parameters
PARAMETER
Write Cycle (erase and program)
Address Setup Time
Address Hold Time
WE and CE Setup Time
WE and CE Hold Time
OE High Setup Time
OE High Hold Time
CE Pulse Width
WE Pulse Width
WE High Width
Data Setup Time
Data Hold Time
Byte Load Cycle Time
SYMBOL
TWC
TAS
TAH
TCS
TCH
TOES
TOEH
TCP
TWP
TWPH
TDS
TDH
TBLC
MIN.
-
0
50
0
0
0
0
70
70
100
50
0
-
TYP.
-
-
-
-
-
-
-
-
-
-
-
-
-
Notes:
All AC timing signals observe the following guideline for determining setup and hold times:
(1) High level signal's reference level is VIH
(2) Low level signal's reference level is VIL
MAX.
10
-
-
-
-
-
-
-
-
-
-
-
150
UNIT
mS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
µS
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