W631GU6KB-12-TR Datasheet, PDF (11/160 Pages) Winbond – 8M  8 BANKS  16 BIT DDR3L SDRAM

7. BLOCK DIAGRAM
CK, CK#
CKE
CLOCK
BUFFER
CS#
RAS#
CAS#
WE#
COMMAND
DECODER
CONTROL
SIGNAL
GENERATOR
A10
A0
MODE
REGISTER
ADDRESS
A9
BUFFER
A11
A12
BA2
BA1
BA0
REFRESH
COUNTER
COLUMN
COUNTER
ZQCL, ZQCS
ZQ
ZQ CAL
RZQ
VSSQ
To ODT/output drivers
COLUMN
DECODER
CELL ARRAY
BANK #0
SENSE
AMPLIFIER
COLUMN
DECODER
CELL ARRAY
BANK #2
SENSE
AMPLIFIER
COLUMN
DECODER
CELL ARRAY
BANK #1
SENSE
AMPLIFIER
COLUMN
DECODER
CELL ARRAY
BANK #4
PREFETCH REGISTER
DATA CONTROL CIRCUIT
DM MASK LOGIC
COLUMN
DECODER
CELL ARRAY
BANK #3
SENSE
AMPLIFIER
COLUMN
DECODER
CELL ARRAY
BANK #6
SENSE
AMPLIFIER
NOTE: The cell array configuration is 8192 * 1024 * 16
- 11 -
W631GU6KB
COLUMN
DECODER
CELL ARRAY
BANK #5
DLL
DQ
BUFFER
READ
drivers
WRITE
drivers
CK, CK#
ODT
DQL0−DQL7
DQU0−DQU7
LDQS, LDQS#
LDQS, LDQS#
DQL0−DQL7
DQU0−DQU7
ODT
LDQS, LDQS#
CONTROL ^{UDQS, UDQS#}
LDM, UDM
LDM, UDM
COLUMN
DECODER
CELL ARRAY
BANK #7
SENSE
AMPLIFIER
Publication Release Date: Jan. 20, 2015
Revision: A07