WCMA1008C1X Datasheet, PDF (7/11 Pages) Weida Semiconductor, Inc. – 128K x 8 Static RAM

Switching Waveforms (continued)
Write Cycle No. 1 (WE Controlled)^{[7. 12, 13]}
ADDRESS
CE₁
CE₂
t_SA
WE
t_WC
t_SCE
t_AW
t_PWE
WCMA1008C1X
t_HA
OE
DATA I/O
NOTE 14
t_HZOE
t_SD
DATA_IN VALID
Write Cycle No. 2 (CE₁ or CE₂ Controlled)^{[7, 12, 13]}
ADDRESS
CE₁
CE₂
WE
t_WC
t_SCE
t_SA
t_AW
t_PWE
t_HD
t_HA
OE
DATA I/O
t_SD
t_HD
DATA_IN VALID
Notes:
12. If CE₁ goes HIGH and CE₂ LOW simultaneously with WE going HIGH, the output remains in a high-impedance state.
13. Data I/O is high-impedance if OE = V_IH.
14. During this period the I/Os are in the output state and input signals should not be applied.
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