WCMA4016U4X Datasheet, PDF (6/12 Pages) Weida Semiconductor, Inc. – 256K x 16 Static RAM

WCMA4016U4X
Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled) ^{[13, 14]}
t_RC
ADDRESS
DATA OUT
t_AA
t_OHA
PREVIOUS DATA VALID
DATA VALID
[14, 15]
Read Cycle No. 2 (OE Controlled)
ADDRESS
CE
OE
BHE/BLE
t_RC
t_ACE
t_DOE
t_LZOE
DATA OUT
V_CC
SUPPLY
CURRENT
t_DBE
t_LZBE
HIGH IMPEDANCE
t_LZCE
t_PU
50%
DATA VALID
t_PD
t_HZCE
t_HZOE
t_HZBE
HIGH
IMPEDANCE
I_CC
50%
I_SB
Notes:
13. Device is continuously selected. OE, CE = V_IL, BHE and/or BLE = V_IL.
14. WE is HIGH for read cycle.
15. Address valid prior to or coincident with CE, BHE, BLE transition LOW.
6