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WCFS0808C1E Datasheet, PDF (1/10 Pages) Weida Semiconductor, Inc. – 32K x 8 Static RAM
S0808C1E
WCFS0808C1E
Features
• High speed
— 12 ns
• Fast tDOE
• CMOS for optimum speed/power
• Easy memory expansion with CE and OE features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
Functional Description
The WCFS0808C1E is a high-performance CMOS static RAM
organized as 32K words by 8 bits. Easy memory expansion is
provided by an active LOW Chip Enable (CE) and active LOW
Output Enable (OE) and three-state drivers. This device has
Logic Block Diagram
32K x 8 Static RAM
an automatic power-down feature, reducing the power con-
sumption by 81% when deselected. The WCFS0808C1E is in
the standard SOJ package.
An active LOW Write Enable signal (WE) controls the writ-
ing/reading operation of the memory. When CE and WE inputs
are both LOW, data on the eight data input/output pins (I/O0
through I/O7) is written into the memory location addressed by
the address present on the address pins (A0 through A14).
Reading the device is accomplished by selecting the device
and enabling the outputs, CE and OE active LOW, while WE
remains inactive or HIGH. Under these conditions, the con-
tents of the location addressed by the information on address
pins are present on the eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and Write Enable
(WE) is HIGH. A die coat is used to improve alpha immunity.
Pin Configurations
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CE
WE
OE
INPUT BUFFER
1024 x 32 x 8
ARRAY
COLUMN
DECODER
POWER
DOWN
SOJ
Top View
A5 1
28 VCC
I/O0
A6 2
27 WE
A7 3
26 A4
I/O1
A8 4
25 A3
I/O2
A9 5
A10 6
24 A2
23 A1
I/O3
A11 7
A12 8
22 OE
21 A0
I/O4
A13 9
20 CE
A14 10
19 I/O7
I/O5
I/O0 11
18 I/O6
I/O6
I/O1 12
I/O2 13
17 I/O5
16 I/O4
I/O7
GND 14
15 I/O3
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum CMOS Standby Current (mA)
WCFS0808C1E 12ns
12
160
10
WCFS0808C1E 15ns
15
155
10
Revised February 18, 2002