W3EG7218S-AD4 Datasheet, PDF (8/13 Pages) White Electronic Designs Corporation – 128MB - 16Mx72 DDR SDRAM UNBUFFERED w/PLL

White Electronic Designs
W3EG7218S-AD4
-BD4
PRELIMINARY
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (continued)
AC CHARACTERISTICS
PARAMETER
DQ-DQS hold, DQS to first DQ to go non-valid, per access
Data Hold Skew Factor
ACTIVE to PRECHARGE command
ACTIVE to READ with Auto precharge command
ACTIVE to ACTIVE/AUTO REFRESH command period
AUTO REFRESH command period
ACTIVE to READ or WRITE delay
PRECHARGE command period
DQS read preamble
DQS read postamble
ACTIVE bank a to ACTIVE bank b command
DQS write preamble
DQS write preamble setup time
DQS write postamble
Write recovery time
Internal WRITE to READ command delay
Data valid output window (DVW)
REFRESH to REFRESH command interval
Average periodic refresh interval
Terminating voltage delay to VDD
Exit SELF REFRESH to non-READ command
Exit SELF REFRESH to READ command
262
SYMBOL
tQH
tQHS
tRAS
tRAP
tRC
tRFC
tRCD
tRP
tRPRE
tRPST
tRRD
tWPRE
tWPRES
tWPST
tWR
tWTR
na
tREFC
tREFI
tVTD
tXSNR
tXSRD
MIN
MAX
tHP - tQHS
0.75
40 120,000
15
60
75
15
15
0.9
1.1
0.4
0.6
15
0.25
0
0.4
0.6
15
1
tQH - tDQSQ
140.6
15.6
0
75
200
265/202
MIN
tHP - tQHS
40
MAX
0.75
120,000
20
65
75
20
20
0.9
1.1
0.4
0.6
15
0.25
0
0.4
0.6
15
1
tQH - tDQSQ
140.6
15.6
0
75
200
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
tCK
tCK
ns
tCK
ns
tCK
ns
tCK
ns
µs
µs
ns
ns
tCK
NOTES
22, 23
31, 48
43
38
38
18, 19
17
22
21
21
November 2004
Rev. 1
8
White Electronic Designs Corporation • [phone] • www.wedc.com