W3E32M72S-XSBX Datasheet, PDF (10/19 Pages) White Electronic Designs Corporation – 32Mx72 DDR SDRAM

White Electronic Designs
W3E32M72S-XSBX
A simple algorithm for meeting both refresh and DLL
requirements is to apply NOPs for tXSNR time, then a DLL
Reset and NOPs for 200 additional clock cycles before
applying any other command.
* Self refresh available in commercial and industrial temperatures only.
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on VCC, VCCQ Supply relative to Vss
Voltage on I/O pins relative to Vss
Operating Temperature TA (Mil)
Operating Temperature TA (Ind)
Storage Temperature, Plastic
Maximum Junction Temperature
Unit
-1 to 3.6
V
-0.5V to VCCQ +0.5V
V
-55 to +125
°C
-40 to +85
°C
-55 to +125
°C
125
°C
NOTE: Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage
to the device. This is a stress rating only and functional operation of the device at these or any other
conditions greater than those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
CAPACITANCE (NOTE 13)
Parameter
Input Capacitance: CK/CK#
Addresses, BA0-1 Input Capacitance
Input Capacitance: All other input-only pins
Input/Output Capacitance: I/Os
Symbol
Max
Unit
CI1
7
pF
CA
24
pF
CI2
9
pF
CIO
9
pF
BGA THERMAL RESISTANCE
Description
Junction to Ambient (No Airflow)
Junction to Ball
Junction to Case (Top)
Symbol
Theta JA
Theta JB
Theta JC
Typical
20.7
18.1
7.5
Units
°C/W
°C/W
°C/W
Notes
1
1
1
Note: These typical thermal resistances are for each DRAM die, if using the total power of the MCP, divide the
given values by 5.
Refer to "PBGA Thermal Resistance Correlation" (Application Note) at www.wedc.com in the application notes
section for modeling conditions.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July 2006
Rev. 6
10
White Electronic Designs Corporation • [phone] • www.wedc.com