VSC7135 Datasheet, PDF (7/16 Pages) Vitesse Semiconductor Corporation – 1.25Gbits/sec Gigabit Ethernet Transceiver

Data Sheet
VSC7135
REFCLK
VITESSE
SEMICONDUCTOR CORPORATION
1.25Gbits/sec
Gigabit Ethernet Transceiver
Figure 6: REFCLK Timing Waveforms
T_L
T_H
V_ih(min)
V_il(max)
Table 3: Reference Clock Requirements
Parameters
Description
FR
Frequency Range
Min Max
123 127
Units
MHz
Conditions
Range over which both transmit
and receive reference clocks on any
link may be centered
FO
Frequency Offset
-200 200
Maximum frequency offset
ppm.
between transmit and receive
reference clocks on one link
DC
T_RCR,T_RCF
REFCLK
Jitter
REFCLK duty cycle
REFCLK rise and fall time
REFCLK Jitter Power
5MHz
∫ ^PhaseNoise
100 H z
30
70
—
2.0
—
40
%
Measured at 1.5V
ns.
Between V_il(max) and V_ih(min)
dbc, RMS for 10^-12 Bit Error Ratio
ps. with zero length external path.
Tested on a sample basis
G52146-0, Rev. 4.0
5/28/98
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: [phone]
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