VS-FA40SA50LC_15 Datasheet, PDF (7/10 Pages) Vishay Siliconix – Power MOSFET, 40 A

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VS-FA40SA50LC
Vishay Semiconductors
D.U.T.
+
2
-
1
R_G
+
Circuit layout considerations
• Low stray inductance
3
• Ground plane
• Low leakage inductance
current transformer
-
- ⁴+
• dV/dt controlled by R_G
• Driver same type as D.U.T.
• I_SD controlled by duty factor "D"
• D.U.T. - Device under test
+
- ^VDD
Fig. 23 - Peak Diode Recovery dV/dt Test Circuit
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
V_GS=10V _*
D.U.T. I_SD Waveform
Reverse
Recovery
Body Diode Forward
Current
Current
di/dt
D.U.T. V_DS Waveform
Diode Recovery
dv/dt
V_DD
Re-Applied
Voltage
Body Diode
Inductor Curent
Forward Drop
Ripple ≤ 5%
I_SD
* V_GS = 5V for Logic Level Devices
Fig. 24 - For N-Channel Power MOSFETs
Revision: 13-Aug-13
7
Document Number: 94803
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