SI8402DB_08 Datasheet, PDF (6/10 Pages) Vishay Siliconix – 20-V N-Channel 1.8-V (G-S) MOSFET

Si8402DB
Vishay Siliconix
PACKAGE OUTLINE
MICRO FOOT: 4-BUMP (2 x 2, 0.8 mm PITCH)
e
e
Recommended Land
4 x φ 0.30 ∼ 0.31
Note 3
Solder Mask φ ∼ 0.40
A₂
A
A₁
b Diamerter
Silicon
Bump Note 2
S
8402
XXX
Mark on Backside of Die
E
e
e
S
D
Notes (Unless Otherwise Specified):
1. Laser mark on the silicon die back, coated with a thin metal.
2. Bumps are 95.5/3.8/0.7 Sn/Ag/Cu.
3. Non-solder mask defined copper landing pad.
4. The flat side of wafers is oriented at the bottom.
Dim.
A
A₁
A₂
b
D
E
e
S
Min.
0.600
0.260
0.340
0.370
1.520
1.520
0.750
0.370
Notes:
a. Use millimeters as the primary measurement.
Millimeters^a
Max.
0.650
0.290
0.360
0.410
1.600
1.600
0.850
0.380
Min.
0.0236
0.0102
0.0134
0.0146
0.0598
0.0598
0.0295
0.0146
Inches
Max.
0.0256
0.0114
0.0142
0.0161
0.0630
0.0630
0.0335
0.0150
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?72657.
www.vishay.com
6
Document Number: 72657
S-82118-Rev. C, 08-Sep-08