IRF9Z30 Datasheet, PDF (6/8 Pages) International Rectifier – P-CHANNEL 50 VOLT POWER MOSFETS

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IRF9Z30, SiHF9Z30
Vishay Siliconix
Vary t_p to obtain
required peak I_L
V_GS = - 10 V ^tp
DUT
V_DSS
L
V_DD
-
E_C
+
I_L
V_DD = 0 5 8 V_DS
0.05 Ω
E_C = 0 75 BV_DS
Fig. 13a - Unclamped Inductive Test Circuit
10
I_L
t_p
V_DD
V_DS
Fig. 13b - Unclamped Inductive Load Test Waveforms
1 ^{0 = 0.5}
0.2
0.1
0.05
0.1 ^0.02
10^-2
10^-5
0.01
10^-4
Single Pulse
(Thermal Response)
10^-3
10^-2
P_DM
t₁
t₂
Notes:
1. Duty Factor, D = t₁/t₂
2. Peak T_j = P_DM x Z_thJC + T_C
0.1
1
10
t₁, Rectangular Pulse Duration (s)
Fig. 14 - Maximum Effective Transient Thermal Impedance, Junction-to-Case vs. Pulse Duration
R_D
Vary I_P to obtain
required peak I_L
V_GS = - 10 V t_p
D.U.T
R_G
-
PS
+
Fig. 15 - Switching Time Test Circuit
12 V
battery
50 kΩ
0.2 μF
Current
regulator
0.3 μF
- V_DS
(Isolated
supply)
Same type
as D.U.T
D
G
D.U.T
- 1.5 mA
I_G
Current
sampling
resistor
S
I_D
Current
sampling
resistor
+ V_DS
Fig. 16 - Gate Charge Test Circuit
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Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91459.
S12-3048-Rev. A, 24-Dec-12
6
Document Number: 91459
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