English
Language : 

IRF9530S Datasheet, PDF (6/8 Pages) Vishay Siliconix – Repetitive avalanche rated
www.vishay.com
IRF9530S, SiHF9530S
Vishay Siliconix
D.U.T.
+
2
-
Peak Diode Recovery dV/dt Test Circuit
+
Circuit layout considerations
• Low stray inductance
• Ground plane
3
• Low leakage inductance
current transformer
-
4
1
Rg
• dV/dt controlled by Rg
• ISD controlled by duty factor “D”
• D.U.T. - device under test
+
- VDD
Compliment N-channel of D.U.T. for driver
1 Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = -10 V a
2 D.U.T. ISD waveform
Reverse
recovery
current
3
Body diode forward
current
dI/dt
D.U.T. VSD waveform
Diode recovery
dV/dt
Re-applied
voltage
4 Inductor current
Body diode forward drop
Ripple ≤ 5 %
Note
a VGS = -5 V for logic level and -3 V drive devices
Fig. 14 - For P-Channel
VDD
ISD
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91077.
S16-0754-Rev. D, 02-May-16
6
Document Number: 91077
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000