SI9750 Datasheet, PDF (5/9 Pages) Vishay Siliconix – In-Rush Current Limit MOSFET Driver

Si9750
Vishay Siliconix
FUNCTIONAL DESCRIPTION
The Si9750 together with an n-channel MOSFET provides the
following functions:
• limits di/dt current for hot insertion applications
• provides complete short circuit protection
• high-side drive allows n-channel MOSFET to be used, for
lower power dissipation
• industry-standard microprocessor reset function
• logic control input and outputs
Setting the Current Limit
(SENSE, HI/LO pins, R_LIMSET, R_SENSE)
The current limit point is determined by the voltage across
R_SENSE, the value of R_LIMSET, and the bias current. The
current limit circuit is shown in Figure 1.
The steady state current is set by the equation:
I_LOAD × R_SENSE > I_BIAS × R_LIMSET
(1)
Due to the highly capacitive nature of some loads, the Si9750
has an option to increase the current limit point to a much
higher level at turn-on. In this case, turn-on is defined as
V_GATE < V_DD + 7.8 V. This function is implemented with the HI/
LO pin. If the HI/LO pin is tied low the current limit is 20%
higher during turn-on than the steady state current limit point.
If a higher current limit is needed at start-up, the HI/LO pin
can be tied high. The equation becomes:
I_LOAD × R_SENSE > 1.2 × I_BIAS × R_LIMSET + I_BIAS(1k Ω + R_HI) (3)
( HI/LO=High )
Notice that any current limit can be set at turn-on using an
optional resistor, R_HI.
Relaxation Mode Current Limit
(C_RETRY pin)
In an overload condition, the Si9750 will go into a relaxation
mode current limit operation that not only protects the source
and load, but also reduces the power dissipated in the
MOSFET. When an overload is detected, the circuit quickly
turns off, then goes into a retry mode whereby the current is
ramped up slowly. If the fault still exists, the current will ramp
down again. This sequence will repeat indefinitely at a period
defined by 10⁶ x C_RETRY until the fault is removed. Typically,
capacitors in the range of 1 nF to 1 µF can be used on
C_RETRY, but the period should be >50 ms.
I_LOAD × R_SENSE > 1.2 × I_BIAS × R_LIMSET
(2)
(with pin HI/LO=Low)
FaxBack 408-970-5600, request 70028
www.siliconix.com
FIGURE 1.
S-60752—Rev. C, 05-Apr-99
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