SI9750 Datasheet, PDF (4/9 Pages) Vishay Siliconix – In-Rush Current Limit MOSFET Driver

Si9750
Vishay Siliconix
PIN CONFIGURATION
PIN DESCRIPTION
Pin Number
1
2
3
4
Function
BOOST
V_DD
GATE
LOAD
5
SENSE
6
LIMSET
7
HI/LO
8
ENABLE
9
R_BIAS
10
V_RST
11
STATUS
12
RESET
13
C_RETRY
14
C_RST
15
GND
16
COIL
Description
Output of on-chip Boost converter. A 100-nF capacitor should be connected between BOOST and GND
Positive supply pin.
Connection to external power MOSFET gate.
Connection to positive supply side of LOAD.
Connects external sense resistor of a sensefet sense pin to SENSE input of overcurrent trip comparator.
A standard MOSFET may also be used in conjunction with a low ohmic value shunt resistor.
Connects overcurrent limit set resistor R_LIMSET to the reference input of overcurrent trip comparator.
CMOS logic input to control the overcurrent trip comparator sensitivity at power-on. HI/LO should be
connected to GND for low Capacitive loads and to V_DD for high capacitive loads.
CMOS logic input to turn IC on or off. GATE voltage remains low when ENABLE is high.
A resistor connected from this pin to GND programs the reference bias current for the overcurrent trip
comparator resistor R_LIMSET and the GATE_(on) charge current. See Functional Description for equations.
Input to voltage monitor comparator.
Open drain NMOS output. This pin is driven low when the current limiter is enabled and the LOAD
voltage is greater than 90% of V_DD.
Open drain NMOS output. This pin is driven low during power on reset or when V_RST is lower than the
internal 1.25-V reference.
A capacitor connected from this pin to GND programs the retry timer.
A capacitor connected from this pin to GND programs the reset timer.
Negative supply pin.
Connection to Boost converter inductor.
S-60752—Rev. C, 05-Apr-99
4
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