DG408L_11 Datasheet, PDF (5/15 Pages) Vishay Siliconix – Precision 8-Ch/Dual 4-Ch Low Voltage Analog Multiplexers

DG408L, DG409L
Vishay Siliconix
SPECIFICATIONS (Single Supply 5 V)
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 5 V, ± 10 %, V- = 0 V
V_EN = 0.6 V or 2.4 V^f
A Suffix
D Suffix
- 55 °C to 125 °C - 40 °C to 85 °C
Temp.^b Typ.^d Min.^c Max.^c Min.^c Max.^c Unit
Analog Switch
Analog Signal Range^e
V_ANALOG
Full
0
5
0
5
V
Drain-Source
On-Resistance
R_DS(on)
V+ = 4.5 V, V_D or V_S = 1 V or 3.5 V, _{Room 35}
I_D = 5 mA
Full
49
62
40
62
R_DS(on) Matching Between
Channels^g
R_DS
V+ = 4.5 V, V_D = 1 V or 3.5 V,
Room 1.5
3
On-Resistance Flatness^{i R}FLAT(on)
I_S = 5 mA
Room
4
3

4
Switch Off Leakage
Current^a
I_S(off)
I_D(off)
V+ = 5.5 V, V_S = 1 V or 4 V
V_D = 4 V or 1 V
Room
Full
Room
Full
-1
1
-1
1
- 15
15 - 10 10
-1
1
-1
1
- 15
15
- 10
10
nA
Channel On Leakage
Current^a
I_D(on)
V+ = 5.5 V, V_D = V_S = 1 V or 4 V
sequence each switch on
Room
Full
-1
1
-1
1
- 15
15 - 10 10
Digital Control
Logic High Input Voltage
Logic Low Input Voltage
Input Current^a
V_INH
V_INL
I_IN
Full
V+ = 5 V
Full
V_AX = V_EN = 2.4 V or 0.6 V
Full
2.4
0.6
- 1.5 1.5
2.4
V
0.6
-1
1
µA
Dynamic Characteristics
Transition Time^e
t_TRANS
V_S1 = 3.5 V, V_S8 = 0 V, (DG408L)
V_S1b = 3.5 V, V_S4b = 0 V, (DG409L)
see figure 2
Room 44
Full
125
125
138
135
Break-Before-Make Time^{e t}OPEN
V_S(all) = V_DA = 3.5 V,
see figure 4
Room 17
1
Full
1
ns
Enable Turn-On Time^e
t_ON(EN)
V_AX = 0 V, V_S1 = 3.5 V (DG408L)
Room 43
Full
60
70
60
65
Enable Turn-Off Time^e
t_OFF(EN)
V_AX = 0 V, V_S1b = 3.5 V (DG409L)
see figure 3
Room 26
Full
45
60
45
50
Charge Injection^e
Q
C_L = 1 nF, R_GEN = 0 , V_GEN = 0 
Room
1
5
5
pC
Off Isolation^{e, h}
Crosstalk^e
OIRR
X_TALK
f = 100 kHz, R_L = 1 k
Room - 70
Room - 80
dB
Source Off Capacitance^e
C_S(off)
f = 1 MHz, V_S = 0 V, V_EN = 0 V
Room 8
Drain Off Capacitance^e
C_D(off)
f = 1 MHz, V_D = 0 V, V_EN = 0 V
Room 21
pF
Drain On Capacitance^e
C_D(on)
f = 1 MHz, V_D = 0 V, V_EN = 2.4 V
(DG409L only)
Room 32
Notes:
a. Leakage parameters are guaranteed by worst case test condition and not subject to production test.
b. Room = 25 °C, full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f. V_IN = input voltage to perform proper function.
g. R_DS(on) = R_DS(on) max. - R_DS(on) min.
h. Worst case isolation occurs on channel 4 do to proximity to the drain pin.
i. R_DS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined analog signal.
Document Number: 71342
www.vishay.com
S11-1066-Rev. G, 30-May-11
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000