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DG408L_11 Datasheet, PDF (4/15 Pages) Vishay Siliconix – Precision 8-Ch/Dual 4-Ch Low Voltage Analog Multiplexers
DG408L, DG409L
Vishay Siliconix
SPECIFICATIONS (Dual Supply V+ = 5 V, V - = - 5 V)
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 5 V, ± 10 %, V- = - 5 V
VEN = 0.6 V or 2.4 Vf
A Suffix
D Suffix
- 55 °C to 125 °C - 40 °C to 85 °C
Temp.b Typ.d Min.c Max.c Min.c Max.c Unit
Analog Switch
Analog Signal Rangee
VANALOG
Full
-5
5
-5
5
V
Drain-Source
On-Resistance
RDS(on)
VD = ± 3.5 V, IS = 10 mA
sequence each switch on
Room 20
Full
40
50
40
50

Switch Off Leakage
Currenta
IS(off)
ID(off)
V+ = 5.5 , V- = 5.5 V
VEN = 0 V, VD = ± 4.5 V, VS = ± 4.5 V
Room
Full
Room
Full
-1
1
-1
1
- 15
15
- 10 10
-1
1
-1
1
- 15
15
- 10
10
nA
Channel On Leakage
Currenta
Digital Control
ID(on)
V+ = 5.5 V, V- = - 5.5 V
Room
VEN = 2.4 V, VD = ± 4.5 V, VS = ± 4.5 V Full
-1
1
-1
1
- 15
15
- 10 10
Logic High Input Voltage
Logic Low Input Voltage
VINH
VINL
Full
2.4
2.4
V
Full
0.6
0.6
Input Currenta
IIN
VAX = VEN = 2.4 V or 0.6 V
Full
- 1.5 1.5
-1
1
µA
Dynamic Characteristics
Transition Timee
tTRANS
VS1 = 3.5 V, VS8 = - 3.5 V, (DG408L)
VS1b = 3.5 V, VS4b = - 3.5 V, (DG409L)
Room
Full
30
60
78
60
65
see figure 2
Break-Before-Make
Timee
tOPEN
VS(all) = VDA = 3.5 V
see figure 4
Room 8
1
Full
1
ns
Enable Turn-On Timee
tON(EN)
VAX = 0 V, VS1 = 3.5 V (DG408L)
Room 25
Full
55
68
55
60
Enable Turn-Off Timee
tOFF(EN)
VAX = 0 V, VS1b = 3.5 V (DG409L)
see figure 3
Room 20
Full
40
50
40
45
Source Off Capacitancee CS(off)
f = 1 MHz, VS = 0 V, VEN = 0 V
Room 6
Drain Off Capacitancee
CD(off)
f = 1 MHz, VD = 0 V, VEN = 0 V
Room 15
pF
Drain On Capacitancee
CD(on)
f = 1 MHz, VD = 0 V, VEN = 2.4 V
Room 29
Notes:
a. Leakage parameters are guaranteed by worst case test condition and not subject to production test.
b. Room = 25 °C, full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. RDS(on) = RDS(on) max. - RDS(on) min.
h. Worst case isolation occurs on channel 4 do to proximity to the drain pin.
i. RDS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined analog signal.
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Document Number: 71342
4
S11-1066-Rev. G, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000