 English |
|
|
|
|
|
|
|
| SI4724 Datasheet, PDF (4/11 Pages) Vishay Siliconix – N-Channel Synchronous MOSFETs With Break-Before-Make | |||
| |||
| ◁ |
Si4724
Vishay Siliconix
APPLICATION CIRCUIT
0 V to 30 V
5V
DC-DC
Controller
VDD
Si4724 CBOOT
D1
SYNC EN
MOSFET
Drive Circuitry
with
Break-Before-
Make
IN
GND
Q1
S1
D2
Q2
S2
CBOOT
VOUT
+
GND
GND
Power Up Sequence:
Ensure VDD is within spec before allowing IN or SYNC EN to be set high.
Power Down Sequence:
Ensure IN and SYNC EN are low before turning VDD off.
Figure 1.
PIN CONFIGURATION
D1 1
D1 2
GND 3
IN 4
SYNC EN 5
S2 6
S2 7
S2 8
SO-16
Top View
16 S1
15 S1
14 CBOOT
13 VDD
12 D2
11 D2
10 D2
9 D2
Ordering Information: Si4724CY-T1
Si4724CY-T1-E3 (Lead (Pb)-free)
TRUTH TABLE
Sync EN
CLK
H
H
H
L
L
H
L
L
Q1
ON
OFF
ON
OFF
Q2
OFF
ON
OFF
OFF
PIN DESCRIPTION
Pin
Number
Symbol
Description
1, 2
D1
Highside MOSFET Drain
3
GND Ground
4
IN Input Logic Signal
5
SYNC EN Synchronous Enable
6, 7, 8
S2
Lowside MOSFET Source
9, 10, 11, 12
D2
Lowside MOSFET Drain
13
VDD
Logic Supply, decoupling to GND with
a cap is strongly recommended.
14
CBOOT
Bootstrap Capacitor for Upper
MOSFET
15, 16
S1
Highside MOSFET Source
www.vishay.com
Document Number: 71863
4
S11-1185-Rev. F, 13-Jun-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese