DG408L_08 Datasheet, PDF (3/12 Pages) Vishay Siliconix – Precision 8-Ch/Dual 4-Ch Low Voltage Analog Multiplexers

DG408L/409L
Vishay Siliconix
SPECIFICATIONS (SINGLE SUPPLY 12 V)
Parameter
Analog Switch
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 12 V, ± 10 %, V- = 0 V
V_EN = 0.8 V or 2.4 V^f
A Suffix
D Suffix
- 55 to 125 °C - 40 to 85 °C
Temp^b Typ^d Min^c Max^c Min^c Max^c Unit
Analog Signal Range^e
V_ANALOG
Full
0
12
0
12
V
Drain-Source On-Resistance
r_DS(on)
V_D = 10.8 V, V_D = 2 V or 9 V, I_S = 10 mA Room
Sequence Each Switch On
Full
17
29
38
29
35
r_DS(on) Matching
Between Channels^g
Δr_DS
V_D = 10.8 V, V_D = 2 V or 9 V
Room 1
3
3
Ω
On-Resistance Flatnessⁱ
r_FLAT(on)
I_S = 10 mA
Room 3
7
7
Switch Off Leakage Current
I_S(off)
I_D(off)
V_EN = 0 V, V_D = 11 V or 1 V
V_S = 1 V or 11 V
Room
Full
Room
Full
-1
1
-1
1
- 15 15 - 10 10
-1
- 15
1
15
-1
- 10
1
10
nA
Channel On Leakage Current I_D(on)
V_S = V_D = 1 V or 11 V
Room
Full
-1
1
-1
1
- 15 15 - 10 10
Digital Control
Logic High Input Voltage
Logic Low Input Voltage
Input Current
Dynamic Characteristics
V_INH
V_INL
I_IN
Full
Full
V_AX = V_EN = 2.4 V or 0.8 V
Full
2.4
2.4
V
0.8
0.8
- 1.5 1.5 - 1
1
µA
Transition Time
t_TRANS
V_S1 = 8 V, V_S8 = 0 V, (DG408L)
V_S1b = 8 V, V_S4b = 0 V, (DG409L)
Room 30
Full
60
68
60
65
See Figure 2
Break-Before-Make Time
t_OPEN
V_S(all) = V_DA = 5 V
See Figure 4
Room 11
1
Full
1
ns
Enable Turn-On Time
t_ON(EN)
V_AX = 0 V, V_S1 = 5 V (DG408L)
Room 38
Full
55
60
55
60
Enable Turn-Off Time
t_OFF(EN)
V_AX = 0 V, V_S1b = 5 V (DG409L)
See Figure 3
Room 18
Full
25
35
25
30
Charge Injection^e
Q
C_L = 1 nF, V_GEN = 0 V, R_GEN = 0 Ω Room 1
5
Off Isolation^{e, h}
Crosstalk^e
OIRR
X_TALK
f = 100 kHz, R_L = 1 kΩ
Room - 70
Room - 82
Source Off Capacitance^e
C_S(off)
f = 1 MHz, V_S = 0 V, V_EN = 0 V
Room 7
5 pC
dB
Drain Off Capacitance^e
C_D(off)
f = 1 MHz, V_D = 2.4 V, V_EN = 0 V
Room 20
pF
Drain On Capacitance^e
C_D(on)
f = 1 MHz, V_D = 0 V, V_EN = 2.4 V
(DG409L only)
Room 31
Power Supplies
Power Supply Range
V+
3
12
3
12
V
Power Supply Current
I+
V_EN = V_A = 0 V or 5 V
Room 0.2
0.7
0.7 mA
Notes:
a. Leakage parameters are guaranteed by worst case test condition and not subject to production test.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f. V_IN = input voltage to perform proper function.
g. Δr_DS(on) = r_DS(on) Max - r_DS(on) Min.
h. Worst case isolation occurs on Channel 4 do to proximity to the drain pin.
i. r_DS(on) flatness is measured as the difference between the minimum and maximum measured values across a defined Analog signal.
Document Number: 71342
S-71241–Rev. E, 25-Jun-07
www.vishay.com
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