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VS-VSKT152 Datasheet, PDF (2/9 Pages) Vishay Siliconix – Industrial standard package
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VS-VSKT152/04PbF
Vishay Semiconductors
ON-STATE CONDUCTION
PARAMETER
SYMBOL
TEST CONDITIONS
Maximum average on-state current 
at case temperature
IT(AV)
180° conduction half sine wave
Maximum RMS on-state current
Maximum peak, one-cycle 
on-state, non-repetitive 
surge current
Maximum I2t for fusing
Maximum I2t for fusing
Value of threshold voltage
On-state slope resistance
Maximum on-state voltage drop
Maximum holding current
Maximum latching current
IT(RMS)
ITSM
I2t
I2t
VT(TO)
rt
VTM
IH
IL
As AC switch
t = 10 ms
t = 8.3 ms
No voltage
reapplied
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
100 % VRRM 
reapplied
No voltage
reapplied
Sine half wave,
initial TJ =
TJ maximum
t = 10 ms
t = 8.3 ms
100 % VRRM 
reapplied
t = 0.1 ms to 10 ms, no voltage reapplied
TJ maximum
Ipk =  x IT(AV), TJ = 25 °C
TJ = 25 °C, anode supply = 6 V, 
resistive load, gate open circuit
TJ = 25 °C, anode supply = 6 V, resistive load
VALUES
150
85
330
4000
4200
3350
3500
80
73
56
51
800
0.82
1.44
1.48
200
400
SWITCHING
PARAMETER
Typical delay time
Typical rise time
Typical turn-off time
SYMBOL
TEST CONDITIONS
tgd
tgr
TJ = 25 °C
Gate current = 1 A, dlg/dt = 1 A/μs
Vd = 0.67 % VDRM
tq
ITM = 300 A, - dl/dt = 15 A/μs; TJ = TJ maximum
VR = 50 V; dV/dt = 20 V/μs; gate 0 V, 100 
VALUES
1
2
50 to 200
BLOCKING
PARAMETER
SYMBOL
Maximum peak reverse and
off-state leakage current
RMS insulation voltage
IRRM,
IDRM
VINS
Critical rate of rise of off-state voltage dV/dt
TEST CONDITIONS
TJ = 125 °C
50 Hz, circuit to base, all terminals shorted, t = 1 s
TJ = TJ maximum, exponential to 67 % rated VDRM
VALUES
50
3500
1000
UNITS
A
°C
A
kA2s
kA2s
V
m
V
mA
UNITS
μs
UNITS
mA
V
V/μs
Revision: 11-Apr-14
2
Document Number: 94514
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