SI9925DY Datasheet, PDF (2/4 Pages) NXP Semiconductors – N-channel enhancement mode field-effect transistor

Si9925DY
Vishay Siliconix
Specifications (T_J = 25_C Unless Otherwise Noted)
Parameter
Symbol
Test Condition
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current^b
Drain-Source On-State Resistance^b
Forward Transconductance^b
Diode Forward Voltage^b
Dynamic^a
V_GS(th)
I_GSS
I_DSS
I_D(on)
r_DS(on)
g_fs
V_SD
V_DS = V_GS, I_D = 250 mA
V_DS = 0 V, V_GS = "12 V
V_DS = 10 V, V_GS = 0 V
V_DS = 16 V, V_GS = 0 V, T_J = 70_C
V_DS w 5 V, V_GS = 5 V
V_GS = 7.2 V, I_D = 5.0 A
V_GS = 4.5 V, I_D = 5.0 A
V_GS = 3.0 V, I_D = 3.9 A
V_GS = 2.5 V, I_D = 1 A
V_DS = 10 V, I_D = 5.0 A
I_S =5.0 A, V_GS = 0 V
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Source-Drain Reverse Recovery Time
Q_g
Q_gs
Q_gd
R_g
t_d(on)
t_r
t_d(off)
t_f
t_rr
Notes
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width v 300 ms, duty cycle v 2%.
V_DS = 6 V, V_GS = 4.5 V, I_D = 5.0 A
V_DD = 6 V, R_L = 6 W
I_D ^ 1 A, V_GEN = 4.5 V, R_G = 6 W
I_F = 5.0 A, di/dt = 100 A/ms
Min Typ^a Max Unit
0.8
V
"100
nA
1
mA
5
30
A
0.025
0.038
0.045
0.041
0.05
W
0.050
0.06
0.062
0.08
14
S
0.81
1.2
V
9
20
2
nC
2.6
1
2.9
W
14
40
13
30
35
60
ns
9
30
60
150
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2
Document Number: 70145
S-03950—Rev. N, 26-May-03