SI9122E Datasheet, PDF (10/20 Pages) Vishay Siliconix – 500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

Si9122E
Vishay Siliconix
normal switching frequency. When a severe overcurrent
condition occurs (V_THCL < V_CS), the NMOS discharges
C_{L_CONT} capacitor immediately at 2 mA rate and the
C_{L_CONT} voltage will be clamped to 1.2 V disabling both DL
and DH outputs.
Before V_CS reaches severe overcurrent condition, a lowering
of the C_{L_CONT} voltage results in PWM control of the output
drive being taken over by the current limit control loop
through C_{L_CONT}. Current control initially reduces the
switching duty cycle toward the minimum the chip can reach
(D_MIN). If this duty cycle reduction still cannot lower the load
current, then the switching frequency will start to fold back to
minimum 1/5 of the nominal frequency. This prevents the
on-time of the primary drivers from being reduced to below
100 ns and avoids current tails. If V_CS > V_THCL, the switching
will then stop.
With constant current mode control and frequency foldback,
protection of the MOSFET switches is increased. The
converter reverts to voltage mode operation immediately
when the primary current falls below the limit level, and
C_{L_CONT} capacitor is charged up and clamped to 6.5 V. The
soft-start function does not apply during current limit period,
as this would constitute hiccup mode operation.
V_IN Voltage Monitor - V_INDET
The chip provides a means of sensing the voltage of V_IN, and
withholding operation of the output drivers until a minimum
voltage of V_REF (3.3 V, 300 mV hysteresis), is achieved. This
is achieved by choosing an appropriate resistive tap between
the ground and V_IN, and comparing this voltage with the
reference voltage. When the applied voltage is greater than
V_REF, the output drivers are activated as normal. V_INDET also
provides the input to the voltage feedforward function.
However, if the divided voltage applied to the V_INDET pin is
greater than V_CC - 0.3 V, the high-side driver, DH, will stop
switching until the voltage drops below V_CC - 0.3 V. Thus, the
resistive tap on the V_IN divider must be set to accommodate
the normal V_CC operating voltage to avoid this condition.
Alternatively, a zener clamp diode from V_INDET to GND may
also be used.
Shutdown Mode
If V_INDET is forced below the lower V_SD threshold, the device
will enter SHUTDOWN mode. This powers down all
unnecessary functions of the controller, ensures that the
primary switches are off, and results in a low level current
demand from the V_IN or V_CC supplies.
V_INEXT
R_EXT
V_IN
12 V
HV_DMOS
PNP Ext
Auxillary
V_CC
V_CC
REG_COMP
V_REF
C_EXT
2 nF
14.5 V
C_VCC
0.5 µF
GND
Figure 5. High-Voltage Pre-Regulator Circuit
CS1
CS2
Blank
-
AV
+
Peak Detect
A_V 150 mV
A_V 100 mV
+
GM
-
V_CC
I_PU
120 µA (nom)
AV
OSC
V_OFFSET
C_{L_CLAMP}
C_{L_CONT}
R_EXT
+ _GM
-
I_PD
0 to 240 µA (nom)
C_EXT
Figure 6. Current Limit Circuit
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Document Number: 73866
S-80112-Rev. D, 21-Jan-08