PRM48DH480T250A03 Datasheet, PDF (7/23 Pages) Vicor Corporation – Building block for high efficiency DC-DC systems

PRM48DH480T250A03
5.0 TIMING DIAGRAMS
Module Inputs are shown in blue; Module Outputs are shown in brown; Timing diagrams assumes the following:
Ø Single PRM (no array)
Ø VS powers error amplifier
Ø RE powers voltage reference and output current transducer
Ø I_OUT is sensed, scaled, and fed back to IF pin such that IF = 2.00 V at full load
1
Start up with
1.2V/ms < dV_IN/dt < maximum
V OV
IN
UV
18 V
Vpr_max
PR
Vpr_min
VIF_OC
IF
VIF_IL
TOFF
TON
2
3
Quick OC _{Input OV}
(t<T_BLNK)
TBLNK
t < TBLNK
4
Input OV
recovery
5
PC
disable
6
PC
release
7
8
Full load Load release and
applied Output OV (slow f/b)
PC ^Vpc
Vpc_en
TBLNK
TOFF
TOFF
TPROT
TON
VC ^Vvc
V OV
OUT
1V
RE
Vre_amb
Vvs_amb
VS
TM ^OT
Vtm_amb
TVC
TVS_RE
TPC_RE
TBLNK
TPC_RE
TPROT
TPC_RE
PRM^® Regulator  
 
Rev 1.4  
 
vicorpower.com  
Page 7 of 23  
 
 
12/2012    
 
800 735.6200