PI352X-00 Datasheet, PDF (5/34 Pages) Vicor Corporation – 30VIN to 60VIN Cool-Power ZVS Buck Regulator

Pin Description
Name
VS1
VIN
VDR
Location
Block 1
Block 3
5K
SYNCI
4K
SYNCO
TEST1
TEST2
TEST3
TEST4
TEST5
PWRGD
EN
SGND
TRK
COMP
EAO
EAIN
VDIFF
VSN
VSP
VOUT
PGND
3K
2K
1K
1J
1H
1E
1G
1F
Block 5
1C
1B
1A
2A
3A
4A
5A
6A,B
Block2
PI352x-00
I/O
Power
Power
I/O
I
O
I/O
I/O
I/O
I/O
I/O
O
I/O
I
O
O
I
O
I
I
Power
Power
Description
Switching node: and ZVS sense for power switches.
Input voltage: and sense for UVLO, OVLO and feed forward ramp.
Gate Driver VCC: Internally generated 5.1V. May be used as a bias supply for low power external
loads. See Application Description for important considerations.
Synchronization input: Synchronize to the falling edge of external clock frequency. SYNCI is a
high impedance digital input node and should always be connected to SGND when not in use. The
PI352x-00 family is not optimized for external synchronization functionality. Refer to Application
Description of Parallel Operation for details.
Synchronization output: Outputs a high signal at the start of each clock cycle for the longer of
½ of the minimum period or T1.
Test Connections: Use only with factory guidance. Connect to SGND for proper operation.
Test Connections: Use only with factory guidance. Connect to SGND for proper operation.
Test Connections: Use only with factory guidance. Connect to SGND for proper operation.
Test Connections: Use only with factory guidance. Connect to SGND for proper operation.
Test Connections: Use only with factory guidance. Connect to SGND for proper operation.
Power Good: High impedance when regulator is operating and V_OUT is in regulation.
Otherwise pulls to SGND.
Enable Input: Regulator enable control. When asserted active or left floating: regulator is enabled.
Otherwise regulator is disabled.
Signal ground: Internal logic ground for EA, TRK, SYNCI, SYNCO communication returns. SGND
and PGND are star connected within the regulator package.
Soft-start and track input: An external capacitor may be connected between TRK pin and SGND
to increase the rise time of the internal reference during soft-start.
Compensation Capacitor: Connect capacitor for control loop dominant pole. See Error Amplifier
section for details. A default C_COMP of 4.7nF is used in the example.
Error amp output: External connection for additional compensation and current sharing.
Error Amp Inverting Input: Connection for the main Vout feedback divider tap.
Independent Amplifier Output: Active only when module is enabled.
Independent Amplifier Inverting Input: If unused connect in unity gain.
Independent Amplifier Non-Inverting Input: If unused connect to SGND.
Direct V_OUT Connect: for per-cycle internal clamp node and feed-forward ramp.
Power Ground: V_IN and V_OUT power returns.
Cool-Power^® ZVS Switching Regulators
Page 5 of 34
Rev 1.3
06/2017
vicorpower.com
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