CHK015A-QIA Datasheet, PDF (3/18 Pages) United Monolithic Semiconductors – 15W Power Packaged Transistor

15W Power Packaged Transistor
CHK015A-QIA
Absolute Maximum Ratings
Tcase= +25°C^{(1) (2) (3)}
Symbol
Parameter
Rating
Unit
Note
V_DS
Drain-Source Biasing Voltage
60
V
V_{GS_Q}
Gate-Source Biasing Voltage
-10. +2
V
I_{G_MAX}
Maximum Gate Current (forward
48
mA
mode)
I_{G_MIN}
Minimum Gate Current (reverse
-2
mA
mode)
I_{D_MAX}
P_IN
T_j
Maximum Drain Current
Maximum Input Power
Junction Temperature
2
A
(4)
(5)
220
°C
T_STG
Storage Temperature
-55 to +150
°C
T_Case
Case Operating Temperature
See note
°C
(4)
(1) _{Operation of this device above anyone of these parameters may cause permanent}
damage.
(2) _{Duration < 1s.}
(3) _{The given values must not be exceeded at the same time even momentarily for any}
parameter, since each parameter is independent from each other. Otherwise deterioration or
destruction of the device may take place.
(4) _{Max junction temperature must be considered}
(5) _{Linked to and limited by IG_MAX & IG_MIN values. Maximum input power depends on}
frequency.
Simulated Source and Load Impedances
V_DS = 50V. I_{D_Q} = 100mA
Zs
Zl
Frequency
Zs
Zl
Pout (W)
PAE (%)
(MHz)
1000
2.96+ j13.07
39.21+ j33.14
21.16
66.69
2000
1.67+ j3.96
18.07+ j24.40
20.88
64.09
3000
1.79- j0.80
11.08+ j17.47
20.68
61.61
4000
1.57- j4.15
6.76+ j10.26
20.40
58.47
5000
1.68- j7.33
4.70+ j5.82
19.92
56.04
6000
2.04- j10.45
4.05+ j2.61
19.32
52.49
The impedances are chosen as a trade-off between Output Power. PAE and Stability of the
device. These values are given in the reference plane defined by the connection between the
transistor leads and the PCB according to the footprint above mentioned
Ref. : DSCHK015A-QIA5357 - 23 Dec 15
3/18
Specifications subject to change without notice
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