TC55V040AFT-55 Datasheet, PDF (9/11 Pages) Toshiba Semiconductor – 524,288-WORD BY 8-BIT FULL CMOS STATIC RAM

TC55V040AFT-55,-70
Note:
(1)
(2)
(3)
In CE1 controlled data retention mode, minimum standby current mode is entered when CE2 ≤ 0.2 V or
CE2 ≥ V_DD − 0.2 V.
When CE1 is operating at the V_IH level (2.2V), the operating current is given by I_DDS1 during the
transition of V_DD from 3.6 to 2.4V.
In CE2 controlled data retention mode, minimum standby current mode is entered when CE2 ≤ 0.2 V.
2003-08-06 9/11