TC55V040AFT-55 Datasheet, PDF (6/11 Pages) Toshiba Semiconductor – 524,288-WORD BY 8-BIT FULL CMOS STATIC RAM

TIMING DIAGRAMS
READ CYCLE ^{(See Note 1)}
Address
CE1
CE2
OE
D_OUT
Hi-Z
TC55V040AFT-55,-70
t_RC
t_ACC
t_OH
t_CO1
t_CO2
t_OE
t_OD
t_OEE
t_ODO
t_COE
VALID DATA OUT
Hi-Z
INDETERMINATE
WRITE CYCLE 1 (R/W CONTROLLED) ^{(See Note 4)}
Address
R/W
CE1
CE2
D_OUT
D_IN
t_AS
(See Note 2)
(See Note 5)
t_WC
t_WP
t_WR
t_CW
t_CW
t_ODW
t_OEW
Hi-Z
t_DS
t_DH
VALID DATA IN
(See Note 3)
(See Note 5)
2003-08-06 6/11