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TC94A09F Datasheet, PDF (7/19 Pages) Toshiba Semiconductor – Single-Chip CD Processor with Built-in Controller
Pin
Number
Symbol
30
P4-1/S12
P4-2
31
/SI0/SI1/
SDA
32
P4-3
/SCK/SCL
TC94A09F
Pin Name
I/O port 4
/Serial data input
/Serial data
input/output
/Serial clock
input/output
Function and Operation
Remarks
3-bit CMOS I/O port.
Input/output can be set for each bit by program.
These pins are also used as serial interface
(SIO) circuit input/output pins.
SIO is a serial interface supporting 2-line and
3-line methods. Starting from the MSB or LSB,
4 or 8-bit serial data are output to the SO/SDA
pin, or data on the S11 and S12 pins are input
to the device at the clock edge on the SCK/SCL
pin. As the serial operating clock (SCK/SCL),
an internal (450/225/150/75 kHz) or external
clock can be selected. Rising or falling shift can
also be selected. The clock and data output can
be N-channel open drain. These selections
facilitate controlling the LSI and
communications between the controllers.
When SIO interrupts are enabled, an interrupt is
generated as soon as execution of the SIO
completes, and the program jumps to address
4. This is effective for performing serial
communications at high speed.
All SIO inputs incorporate a Schmidt circuit.
SIO and its control can be set by program.
MVDD
Input instruction + SI0ON
38
TESTC
Input pins for controlling Test mode.
Test mode control
input
When the pins are at High level, the device is in
Test mode; at Low level, in normal operation.
88
TESTM
Normally, set the pins to Low level or NC
(pull-down resistors are incorporated).
RIN2
MVDD
OT19/ HSO
OT20/SPCK
39~42
OT21/SPDA
OT22/COFS
Output port
/CD control signal
output
4-bit general-purpose output port.
After system reset, the pins are set to a
Low-level output port.
The pins can be switched to CD control output
pins by program. Setting OT19 to OT22 to 0
switches all four pins to CD control output pins.
Setting the CDIO bit to 1 enables the pins to be
switched as follows according to the segment
data contents of the S15 and S16 pins:
ï½¥ HSO Outputs playback speed mode.
Normal speed: High
Double speed: Low
ï½¥SPCK Outputs clock for reading processor
status signal (176.4 kHz).
ï½¥SPDA Outputs processor status signal.
ï½¥COFS Outputs frame clock for correction
(7.35 kHz).
MVDD
7
2001-10-15