 English |
|
|
|
|
|
|
|
| TC94A09F Datasheet, PDF (15/19 Pages) Toshiba Semiconductor – Single-Chip CD Processor with Built-in Controller | |||
| |||
| ◁ |
TC94A09F
LCD common output/output port (COM1/OT1~COM4/OT4)
Characteristics
Output current
âHâ level
âLâ level
Bias voltage
1/2 level
1/3 level
2/3 level
Test
Symbol Circuit
Test Condition
Min Typ. Max Unit
IOH1
¾ VOH = 4.5 V (LCD output)
-200 -600 ¾
mA
IOH2
¾ VOH = 4.5 V (OT output)
-15 -30
¾
mA
IOL1
¾ VOL = 0.5 V (LCD output)
200 600 ¾
mA
IOL5
¾ VOL = 0.5 V (OT output)
4.0
10
¾
mA
VBS2
¾ No load (LCD output, 1/2 bias method set)
2.3
2.5
2.7
VBS1
¾
1.47 1.67 1.87
V
No load (LCD output, 1/3 bias method set)
VBS3
¾
3.13 3.33 3.53
Segment output, output ports, I/O ports, and CD function output
(S1/OT4~S9/OT13, S10/OT14/ZDET~S14/OT18/LRCK, P8-0/S14/BCK~P8-3/S18/IPF, OT19)
Characteristics
Output current
âHâ level
âLâ level
Input leakage current
Input voltage
âHâ level
âLâ level
Bias voltage
1/3 level
2/3 level
Symbol
Test
Circuit
Test Condition
IOH1
IOH4
¾ VOH = 4.5 V (LCD output)
¾
VOH = 4.5 V (OT output, CD output,
excluding P8-0~P8-3 pins)
IOL1
¾ VOL = 0.5 V (LCD output)
IOL5
¾ VOL = 0.5 V (OT output, CD output)
ILI
¾ VIH = 5.0 V, VIL = 0 V (P8-0~P8-3)
VIH
¾ (P8-0~P8-3, CLCK)
VIL
VBS1
VBS3
¾ (P8-0~P8-3, CLCK)
¾
No load (LCD output, 1/3 bias method set)
¾
Min Typ. Max Unit
-200 -600 ¾
mA
-1.5 -4.0 ¾
mA
200 600 ¾
mA
4.0
10
¾
mA
¾
¾ ±1.0 mA
MVDD
´ 0.8
~
MVDD
V
0
~
MVDD
´ 0.2
1.47 1.67 1.87
V
3.13 3.33 3.53
I/O port (P1-0~P4-3)
Characteristics
âHâ level
Output current
âLâ level
Input leakage current
Symbol
Test
Circuit
Test Condition
IOH3
¾ VOH = 4.5 V
IOL3
¾
VOL = 0.5 V
(excluding P4-1, P4-2, P4-3 pins)
IOL5
ILI
¾ VOL = 0.5 V (P4-1, P4-2, P4-3 pins)
¾ VIH = 5.0 V, VIL = 0 V
âHâ level
VIH
¾
¾
Input voltage
âLâ level
VIL
¾
¾
Input pull-up/down resistance RIN1
¾ (P1-0~P1-3 pins) pull-down/up set
Min Typ. Max Unit
-0.8 -2.0 ¾
1.0
3.0
¾
mA
4.0
10
¾
¾
¾ ±1.0 mA
MVDD
´ 0.8
~
MVDD
V
0
~
MVDD
´ 0.2
25
50 120 kW
HOLD , INTR input port, RST input,
1-bit DAC data input (EMPHin/HSOin/LRCKin/DATAin/BCKin) Input port (IN1/IN2)
Characteristics
Input leakage current
Input voltage
âHâ level
âLâ level
Symbol
Test
Circuit
Test Condition
ILI
¾ VIH = 5.0 V, VIL = 0 V
VIH
¾
¾
VIL
¾
¾
Min Typ. Max Unit
¾
¾ ±1.0 mA
MVDD
´ 0.8
~
MVDD
V
0
~
MVDD
´ 0.2
15
2001-10-15
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese