TC551001BPL Datasheet, PDF (7/13 Pages) Toshiba Semiconductor – SILICON GATE CMOS 131,072 WORD x 8 BIT STATIC RAM

SR01020795
Notes:
1. R/W is High for Read Cycle.
Static RAM
TC551001BPL/BFL/BFTL/BTRL-70L/85L
2. Assuming that CE1 Low transition or CE2 High transition occurs coincident with or after the R/W low transition, Out-
puts remain in a high impedance state.
3. Assuming that CE1 High transition or CE2 Low transition occurs coincident with or prior to the R/W high transition,
Outputs remain in a high impedance state.
4. Assuming that OE is High for a Write Cycle, Outputs are in a high impedance state during this period.
5. The I/O may be in the output state during this time, input signals of opposite phase must not be applied.
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