TC551001BPL Datasheet, PDF (4/13 Pages) Toshiba Semiconductor – SILICON GATE CMOS 131,072 WORD x 8 BIT STATIC RAM

TC551001BPL/BFL/BFTL/BTRL-70L/85L
Static RAM
AC Characteristics (Ta = 0 ~ 70°C, V_DD = 5V±10%)
Read Cycle
SYMBOL
PARAMETER
t_RC
t_ACC
t_CO1
t_CO2
t_OE
t_COE
t_OEE
t_OD
t_ODO
t_OH
Read Cycle Time
Address Access Time
CE1 Access Time
CE2 Access Time
Output Enable to Output in Valid
Chip Enable (CE1, CE2) to Output in Low-Z
Output Enable to Output in Low-Z
Chip Enable (CE1, CE2) to Output in High-Z
Output Enable to Output in High-Z
Output Data Hold Time
TC551001BPL/BFL/BFTL/BTRL
-70L
-85L
MIN. MAX. MIN. MAX.
70
–
85
–
–
70
–
85
–
70
–
85
–
70
–
85
–
35
–
45
10
–
10
–
5
–
5
–
–
25
–
30
–
25
–
30
10
–
10
–
UNIT
ns
Write Cycle
SYMBOL
PARAMETER
t_WC
t_WP
t_CW
t_AS
t_WR
t_ODW
t_OEW
t_DS
t_DH
Write Cycle Time
Write Pulse Width
Chip Selection to End of Write
Address Setup Time
Write Recovery Time
R/W to Output in High-Z
R/W to Output in Low-Z
Data Setup Time
Data Hold Time
AC Test Conditions
Input Pulse Levels
Input Pulse Rise and Fall Time
Input Timing Measurement Reference Level
Output Timing Measurement Reference Level
Output Load
TC551001BPL/BFL/BFTL/BTRL
-70L
-85L
MIN. MAX. MIN. MAX.
70
–
85
–
50
–
60
–
60
–
75
–
0
–
0
–
0
–
0
–
–
25
–
30
5
–
5
–
30
–
35
–
0
–
0
–
UNIT
ns
2.4V/0.6V
5ns
1.5V
1.5V
1 TTL Gate and C_L = 100pF
SR01020795
4
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