TA1317ANG Datasheet, PDF (50/59 Pages) Toshiba Semiconductor – Deflection Processor IC for TV

TA1317ANG
Note
No.
Parameter
35 Vertical guard detection
output current
(BLK-OUT output current)
SW5
OFF
SW6
C
SW7
ON
Test Condition
SW Mode
SW8 SW10 SW11 SW17 SW24
Test Method
(unless otherwise specified, V_CC = 9 V, Ta = 25 ± 3°C, data = preset values)
OFF B
ON
A
A (1) Connect external supply voltage V₆ = 8 V to TP6 (V NF).
(2) Measure pin 20 (BLK OUT) voltage V₂₀ and calculate output current (I₂₀) using the
following formula.
V₂₀
I₂₀ =
10 kΩ
36 Vertical centering DAC output OFF
B
ON OFF B
ON
A
voltage 1 (V centering)
37 Vertical centering DAC output OFF
A
OFF OFF
B
ON
A
voltage 2 (V shift)
38 Vertical centering change
amount in V STOP mode
ON
A OFF OFF B
ON
A
A (1) Set VD (sub-address: 00) to AC-Coupling mode (data: 81).
(2) Set V CENTERING (sub-address: 05) to minimum (data: 00) and measure pin 2
(CENTER DAC) voltage V_CA (00).
(3) Set V CENTERING (sub-address: 05) to maximum (data: FE) and measure pin 2
(CENTER DAC) voltage V_CA (FE).
A (1) Set VD (sub-address: 00) to DC-Coupling mode (data: 80).
(2) Set V SHIFT (sub-address: 01) to minimum (data: 80) and measure pin 2 (CENTER
DAC) voltage V_CD (80).
(3) Set V SHIFT (sub-address: 01) to maximum (data: 83) and measure pin 2
(CENTER DAC) voltage V_CD (83).
A (1) Set VD (sub-address: 00) to DC-Coupling mode (data: 80).
(2) Set to V STOP (sub-address: 0B, data: 81).
(3) Set V CENTERING (sub-address: 05) to minimum (data: 00) and measure Pin 6 (V
NF) voltage V_Y (00).
(4) Set V CENTERING (sub-address: 05) to center (data: 80) and measure Pin 6 (V
NF) voltage V_Y (80).
(5) Set V CENTERING (sub-address: 05) to minimum (data: FE) and measure Pin 6 (V
NF) voltage V_Y (FE).
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2005-08-18