TA1317ANG Datasheet, PDF (23/59 Pages) Toshiba Semiconductor – Deflection Processor IC for TV

Characteristics
Vertical ramp cut level
Analog blanking phase
Parabola amplitude adjustment (EW
parabola) change amount at PWM
Symbol
V_CHH
V_CLH
BLHL
BLHM
BLHH
BLLL
BLLM
BLLH
V_PP (00)
V_PP (20)
V_PP (3F)
V_PP
Test
Circuit
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
TA1317ANG
Test Condition
Min Typ. Max Unit
20.0 26.0 32.0
(Note 41)
%
26.0 32.1 38.0
5.05 5.90 6.75
2.30 2.70 3.10
⎯ 0.00 0.10
(Note 42)
ms
5.10 6.00 6.90
2.05 2.40 3.00
⎯ 0.00 0.10
0.00 0.02 0.06
1.6 2.00 2.30
(Note 43)
V_p-p
2.80 3.30 3.80
2.80 3.30 3.80
23
2005-08-18