TMP19A43CD Datasheet, PDF (468/523 Pages) Toshiba Semiconductor – 32-bit RISC Microprocessor

TMP19A43
The instruction code is shifted from the least significant bit to the instruction register.
Most significant
TDI
Least significant
TDO
Fig. 23-4 Direction of a Shift of the Instruction Code to the Instruction Register
23.3.2 Bypass Register
The bypass register has a one-bit width. If the TAP controller is in the Shift-DR state (bypass state), data
at the TDI pin is shifted into the bypass register, and the output from the bypass register is shifted out to
the TDO output pin.
Simply put, the bypass register is a circuit for bypassing the devices in a serial boundary scan chain
connected to the substrates that are not required for a test to be conducted. Fig. 23-5 shows the logical
position of the bypass register in a boundary scan chain.
If the bypass register is used, the speed of access to boundary scan registers in an active IC in a data
path used for substrate level testing can be increased.
Input to
substrate
Input from
substrate JTDI
JTDO
JTDO
JTDI
JTDI
JTDO
JTDO
JTDI
IC package
Substrate
JTDI
JTDO
Bypass register
Pad cell of boundary scan register
Fig. 23-5 Function of the Bypass Register
TMP19A43(rev2.0) 23-4
JTAG Interface