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TC55NEM216ASTV55 Datasheet, PDF (4/12 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
TC55NEM216ASTV55,70
DC CHARACTERISTICS (Ta = −40° to 85°C, VDD = 5 V ± 10%)
SYMBOL PARAMETER
TEST CONDITION
IIL
IOH
IOL
ILO
lDDO1
lDDO2
IDDS1
IDDS2
Input Leakage
Current
VIN = 0 V~VDD
Output High Current VOH = 2.4 V
Output Low Current
Output Leakage
Current
Operating Current
Standby Current
VOL = 0.4 V
CE = VIH or CS = VIL or LB = UB = VIH or
R/W = VIL or OE = VIH, VOUT = 0 V~VDD
CE = VIL and CS = VIH and
R/W = VIH, LB = UB = VIL,
IOUT = 0 mA,
Other Input = VIH/VIL
CE = 0.2 V and CS = VDD − 0.2 V and
R/W = VDD − 0.2 V, LB = UB = 0.2 V,
IOUT = 0 mA,
Other Input = VDD − 0.2 V/0.2 V
1) CE = VIH
2) CS= VIL
3) LB = UB = VIH
1) CE = VDD − 0.2 V
2) CS = 0.2 V
3) LB = UB = VDD − 0.2 V, CE = 0.2 V,
CS = VDD − 0.2 V
MIN TYP MAX UNIT
  ±1.0 µA
−1.0 
2.1 
 mA
 mA
  ±1.0 µA
tcycle
MIN
1 µs
  35
mA
8
tcycle
MIN
1 µs
  30
mA
3
  3 mA
Ta = 25°C
1
Ta = −40~40°C   3 µA
Ta = −40~85°C   20
DC CHARACTERISTICS (Ta = −40° to 85°C, VDD = 3 V ± 10%)
SYMBOL PARAMETER
TEST CONDITION
IIL
IOH
IOL
ILO
IDDO2
IDDS2
Input Leakage
Current
VIN = 0 V~VDD
Output High Current VOH = VDD − 0.2 V
Output Low Current
Output Leakage
Current
Operating Current
VOL = 0.2 V
CE = VIH or CS = VIL or LB = UB = VIH or
R/W = VIL or OE = VIH, VOUT = 0 V~VDD
CE = 0.2 V and CS = VDD − 0.2 V and
R/W = VDD − 0.2 V, LB = UB = 0.2 V,
IOUT = 0 mA,
Other Input = VDD − 0.2 V/0.2 V
Standby Current
1) CE = VDD − 0.2 V
2) CS = 0.2 V
3) LB = UB = VDD − 0.2 V, CE = 0.2 V,
CS = VDD − 0.2 V
MIN TYP MAX UNIT
  ±1.0 µA
−0.1 
0.1 
 mA
 mA
  ±1.0 µA
tcycle
MIN
1 µs
  30
mA
3 
Ta = 25°C
1
Ta = −40~40°C   3 µA
Ta = −40~85°C   20
CAPACITANCE (Ta = 25°C, f = 1 MHz)
SYMBOL
PARAMETER
TEST CONDITION
CIN
Input Capacitance
VIN = GND
COUT
Output Capacitance
VOUT = GND
Note: This parameter is periodically sampled and is not 100% tested.
MAX
10
10
UNIT
pF
pF
2002-10-30 4/12