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TC55NEM216ASTV55 Datasheet, PDF (2/12 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
BLOCK DIAGRAM
TC55NEM216ASTV55,70
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
I/O16
CE
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A17
MEMORY CELL ARRAY
2,048 × 128 × 16
(4,194,304)
VDD
GND
SENSE AMP
CLOCK
GENERATOR
COLUMN ADDRESS
DECODER
COLUMN ADDRESS
REGISTER
COLUMN ADDRESS
BUFFER
CE
A0 A1 A2 A3 A4 A5 A16
CS
CE
CE
LB
UB
R/W
OE
2002-10-30 2/12