TC55NEM216ASTV55 Datasheet, PDF (1/12 Pages) Toshiba Semiconductor – TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

TC55NEM216ASTV55,70
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
262,144-WORD BY 16-BIT FULL CMOS STATIC RAM
DESCRIPTION
The TC55NEM216ASTV is a 4,194,304-bit static random access memory (SRAM) organized as 262,144 words by
16 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 2.7 to
5.5 V power supply. Advanced circuit technology provides both high speed and low power at an operating current of
3 mA/MHz (typ) and a minimum cycle time of 55 ns. It is automatically placed in low-power mode at 1 µA standby
current (typ) when chip enable ( CE ) is asserted high or chip select (CS) is asserted low. There are three control
inputs. CE is used to select the device and for data retention control, and output enable ( OE ) provides fast
memory access. Data byte control pin ( LB , UB ) provides lower and upper byte access. This device is well suited to
various microprocessor system applications where high speed, low power and battery backup are required. And,
with a guaranteed operating extreme temperature range of −40° to 85°C, the TC55NEM216ASTV can be used in
environments exhibiting extreme temperature conditions. The TC55NEM216ASTV is available in a plastic 44-pin
thin-small-outline package (TSOP).
FEATURES
• Low-power dissipation
Operating: 15 mW/MHz (typical)
• Single power supply voltage of 2.7 to 5.5 V
• Power down features using CE
• Data retention supply voltage of 2.0 to 5.5 V
• Direct TTL compatibility for all inputs and outputs
• Wide operating temperature range of −40° to 85°C
• Standby Current (maximum): 20 µA
PIN ASSIGNMENT (TOP VIEW)
44 PIN TSOP
A4 1
A3 2
A2 3
A1 4
A0 5
CE 6
I/O1 7
I/O2 8
I/O3 9
I/O4 10
VDD 11
GND 12
I/O5 13
I/O6 14
I/O7 15
I/O8 16
R/W 17
A15 18
A14 19
A13 20
A12 21
A16 22
44 A5
43 A6
42 A7
41 OE
40 UB
39 _LB
38 I/O16
37 I/O15
36 I/O14
35 I/O13
34 GND
33 VDD
32 I/O12
31 I/O11
30 I/O10
29 I/O9
28 CS
27 A8
26 A9
25 A10
24 A11
23 A17
• Access Times (maximum):
TC55NEM216ASTV
55
70
Access Time
55 ns
70 ns
CE Access Time
55 ns
70 ns
OE Access Time
30 ns
35 ns
• Package:
TSOP II44-P-400-0.80
(Weight: g typ)
PIN NAMES
A0~A17 Address Inputs
CE
Chip Enable
CS
Chip Select
R/W
Read/Write Control
OE
Output Enable
LB , UB Data Byte Control
I/O1~I/O16 Data Inputs/Outputs
V_DD
GND
Power
Ground
NC
No Connection
2002-10-30 1/12